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DM9010 参数 Datasheet PDF下载

DM9010图片预览
型号: DM9010
PDF下载: 下载PDF文件 查看货源
内容描述: 10/100 Mbps的单芯片以太网控制器与通用处理器接口 [10/100 Mbps Single Chip Ethernet Controller with General Processor Interface]
分类和应用: 控制器以太网局域网(LAN)标准
文件页数/大小: 62 页 / 511 K
品牌: DAVICOM [ DAVICOM SEMICONDUCTOR, INC. ]
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DM9010  
Single Chip Ethernet Controller with General Processor Interface  
9.11 Power Reduced Mode  
9.11.1 Power Down Mode  
The Signal detect circuit is always turned to monitor whether  
there is any signal on the media (cable disconnected). The  
DM9010 automatically turns off the power and enters the  
Power Reduced mode, whether its operation mode is  
N-way or force mode. When enters the Power Reduced  
mode, the transmit circuit still sends out fast link pules with  
minimum power consumption. If a valid signal is detected  
from the media, which might be N-ways fast link pules,  
10Base-T normal link pules, or 100Base-TX MLT3 signals,  
the device will wake up and resume a normal  
operation mode.  
The PHY Reg.0.11 can be set high to enter the Power  
Down mode, which disables all transmit, receive functions  
and MII interface functions, except the MDC/MDIO  
management interface.  
9.11.2 Reduced Transmit Power Mode  
The additional Transmit power reduction can be  
gained by designing with 1.25:1 turns ration magnetic  
on its TX side and using a 8.5KΩ resistor on BGRES  
and AGND pins, and the TXO+/TXO- pulled high  
resistors should be changed from 50Ω to 78Ω.  
That can be writing Zero to PHY Reg.16.4 to disable Power  
Reduced mode.  
This configuration could be reduced about 20%  
transmit power.  
Preliminary  
48  
Version: DM9010-17--DS-P04  
Jan. 18, 2006  
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