Extremely Accurate I
2
C-Integrated
RTC/TCXO/Crystal
DS3231
Figure 1. Timekeeing Registers
ADDRESS
00H
01H
02H
03H
04H
05H
06H
07H
08H
09H
0AH
0BH
0CH
0DH
0EH
0FH
10H
11H
A1M1
A1M2
A1M3
A1M4
A2M2
A2M3
A2M4
EOSC
OSF
SIGN
SIGN
12/24
DY/DT
BBSQW
0
DATA
DATA
12/24
DY/DT
BIT 7
MSB
0
0
0
0
0
Century
12/24
0
0
0
10 Year
10 Seconds
10 Minutes
AM/PM
10 Hour
10 Hour
0
BIT 6
BIT 5
10 Seconds
10 Minutes
AM/PM
10 Hour
0
10 Date
10 Month
10 Hour
0
0
Date
Month
Year
Seconds
Minutes
Hour
Day
Date
Minutes
10 Hour
Hour
Day
Date
RS1
EN32kHz
DATA
DATA
INTCN
BSY
DATA
DATA
A2IE
A2F
DATA
DATA
A1IE
A1F
DATA
DATA
0
DATA
DATA
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
LSB
FUNCTION
Seconds
Minutes
Hours
Day
Day
Date
Month/
Century
Year
Alarm 1 Seconds
Alarm 1 Minutes
Alarm 1 Hours
Alarm 1 Day
Alarm 1 Date
Alarm 2 Minutes
Alarm 2 Hours
Alarm 2 Day
Alarm 2 Date
Control
Control/Status
Aging Offset
MSB of Temp
LSB of Temp
RANGE
00–59
00–59
1–12 +
AM/PM
00–23
1–7
00–31
01–12 +
Century
00–99
00–59
00–59
1–12 +
AM/PM
00–23
1–7
1–31
00–59
1–12 +
AM/PM
00–23
1–7
1–31
—
—
—
—
—
Seconds
Minutes
Hour
10 Date
10 Minutes
AM/PM
10 Hour
10 Date
CONV
0
DATA
DATA
RS2
12H
DATA
DATA
0
0
0
0
0
0
Note:
Unless otherwise specified, the registers’ state is not defined when power is first applied.
DS3231 I
2
C interface may be placed into a known state
by toggling SCL until SDA is observed to be at a high
level. At that point the microcontroller should pull SDA
low while SCL is high, generating a START condition.
Clock and Calendar
The time and calendar information is obtained by read-
ing the appropriate register bytes. Figure 1 illustrates the
RTC registers. The time and calendar data are set or ini-
tialized by writing the appropriate register bytes. The con-
tents of the time and calendar registers are in the
binary-coded decimal (BCD) format. The DS3231 can be
run in either 12-hour or 24-hour mode. Bit 6 of the hours
register is defined as the 12- or 24-hour mode select bit.
When high, the 12-hour mode is selected. In the 12-hour
mode, bit 5 is the
AM/PM
bit with logic-high being PM. In
the 24-hour mode, bit 5 is the second 10-hour bit (20–23
hours). The century bit (bit 7 of the month register) is tog-
gled when the years register overflows from 99 to 00.
The day-of-week register increments at midnight.
Values that correspond to the day of week are user-
defined but must be sequential (i.e., if 1 equals
Sunday, then 2 equals Monday, and so on). Illogical
time and date entries result in undefined operation.
When reading or writing the time and date registers, sec-
ondary (user) buffers are used to prevent errors when
the internal registers update. When reading the time and
date registers, the user buffers are synchronized to the
internal registers on any START and when the register
pointer rolls over to zero. The time information is read
from these secondary registers, while the clock contin-
ues to run. This eliminates the need to reread the regis-
ters in case the main registers update during a read.
11
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DALLAS [ DALLAS SEMICONDUCTOR ]
