DS2506
When reading the data memory of the DS2506 with the Extended Read Memory command, there are two
situations where a 16-bit CRC is transmitted. One 16-bit CRC follows each Redirection Byte, another
16-bit CRC is received after the last byte of a memory data page is read. The CRC at the end of the
memory page is always the result of clearing the CRC generator and shifting in the data bytes beginning
at the first addressed memory location of the EPROM data page until the last byte of this page. With the
initial pass through the Extended Read Memory flow chart the 16-bit CRC value is the result of shifting
the command byte into the cleared CRC generator, followed by the two address bytes and the Redirection
Byte. Subsequent passes through the Extended Read Memory flow chart will generate a 16-bit CRC that
is the result of clearing the CRC generator and then shifting in the Redirection Byte only.
When writing to the DS2506 (either data memory or status memory), the bus master receives a 16-bit
CRC to verify the correctness of the data transfer before applying the programming pulse. With the initial
pass through the Write Memory/Status flow chart the 16-bit CRC will be generated by clearing the CRC
generator, shifting in the command, address low, address high and the data byte. Subsequent passes
through the Write Memory/Status flow chart due to the DS2506 automatically incrementing its address
counter will generate an 16-bit CRC that is the result of loading (not shifting) the new (incremented)
address into the CRC generator and then shifting in the new data byte.
The comparison of CRC values and decision to continue with an operation are determined entirely by the
bus master. There is no circuitry on the DS2506 that prevents a command sequence from proceeding if
the CRC stored in or calculated by the DS2506 does not match the value generated by the bus master. For
more details on generating CRC values including example implementations in both hardware and
software, see the Book of DS19xx iButton Standards.
CRC-16 HARDWARE DESCRIPTION AND POLYNOMIAL Figure 12
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DALLAS [ DALLAS SEMICONDUCTOR ]
