DS2152
AC CHARACTERISTICS -
(0°C to 70°C; VDD=5V ± 5% for DS2152L;
RECEIVE SIDE
PARAMETER
(-40°C to +85°C; VDD=5V ± 5% for DS2152LN)
SYMBOL MIN TYP MAX UNITS NOTES
RCLKO Period
RCLKO Pulse Width
tLP
tLH
tLL
tLH
tCL
tCP
tCH
tCL
tSP
tSP
tSH
tSL
tSU
tPW
tSU
tHD
tR, tF
tDD
tD1
648
324
324
324
324
648
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
250
250
200
200
1
1
2
2
RCLKO Pulse Width
RCLKI Period
RCLKI Pulse Width
75
75
122
122
50
50
20
50
20
RSYSCLK Period
648
488
3
4
RSYSCLK Pulse Width
RSYNC Set Up to RSYSCLK Falling
RSYNC Pulse Width
tSH-5
RPOSI/RNEGI Set UP to RCLKI Falling
RPOSI/RNEGI Hold From RCLKI Falling
RSYSCLK/RCLKI Rise and Fall Times
Delay RCLKO to RPOSO, RNEGO Valid
Delay RCLK to RSER, RDATA, RSIG,
RLINK Valid
20
25
50
50
Delay RCLK to RCHCLK, RSYNC,
RCHBLK, RFSYNC, RLCLK
tD2
50
ns
Delay RSYSCLK to RSER, RSIG Valid
Delay RSYSCLK to RCHCLK, RCHBLK,
RMSYNC, RSYNC
tD3
tD4
50
50
ns
ns
See Figures 16-4 to 16-6 for details.
NOTES:
1. Jitter attenuator enabled in the receive path.
2. Jitter attenuator disabled or enabled in the transmit path.
3. RSYSCLK=1.544 MHz
4. RSYSCLK=2.048 MHz
84 of 93
DALLAS [ DALLAS SEMICONDUCTOR ]
