DS1339 I2C Serial Real-Time Clock
Figure 7. Programmable Trickle Charger
R1
250ꢀ
VCC
VBACKUP
R2
2kꢀ
R3
4kꢀ
1 OF 16 SELECT
1 OF 2
1 OF 3
NOTE: ONLY 1010 ENABLES CHARGER
SELECT
SELECT
TCS0-3 = TRICKLE CHARGER SELECT
DS0-1
= DIODE SELECT
TCS3
BIT 7
TCS2
BIT 6
TCS1
BIT 5
TCS0
BIT 4
DS1
BIT 3
DS0
BIT 2
ROUT1
BIT 1
ROUT0
BIT 0
ROUT0-1 = RESISTOR SELECT
TRICKLE CHARGE REGISTER
I2C SERIAL DATA BUS
The DS1339 supports the I2C bus protocol. A device that sends data onto the bus is defined as a transmitter and a
device receiving data as a receiver. The device that controls the message is called a master. The devices that are
controlled by the master are referred to as slaves. The bus must be controlled by a master device that generates
the serial clock (SCL), controls the bus access, and generates the START and STOP conditions. The DS1339
operates as a slave on the I2C bus. Within the bus specifications, a standard mode (100kHz cycle rate) and a fast
mode (400kHz cycle rate) are defined. The DS1339 works in both modes. Connections to the bus are made via the
open-drain I/O lines SDA and SCL.
The following bus protocol has been defined (Figure 8):
Cꢀ Data transfer may be initiated only when the bus is not busy.
Cꢀ During data transfer, the data line must remain stable whenever the clock line is HIGH. Changes in the data
line while the clock line is HIGH are interpreted as control signals.
Accordingly, the following bus conditions have been defined:
Bus not busy: Both data and clock lines remain HIGH.
Start data transfer: A change in the state of the data line, from HIGH to LOW, while the clock is HIGH, defines a
START condition.
Stop data transfer: A change in the state of the data line, from LOW to HIGH, while the clock line is HIGH,
defines the STOP condition.
Data valid: The state of the data line represents valid data when, after a START condition, the data line is stable
for the duration of the HIGH period of the clock signal. The data on the line must be changed during the LOW
period of the clock signal. There is one clock pulse per bit of data.
15 of 18
DALLAS [ DALLAS SEMICONDUCTOR ]
