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DS1307ZN 参数 Datasheet PDF下载

DS1307ZN图片预览
型号: DS1307ZN
PDF下载: 下载PDF文件 查看货源
内容描述: 64 ×8串行实时时钟 [64 X 8 Serial Real Time Clock]
分类和应用: 外围集成电路光电二极管时钟
文件页数/大小: 14 页 / 225 K
品牌: DALLAS [ DALLAS SEMICONDUCTOR ]
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DS1307/1308
CONTROL REGISTER
The DS1307/DS1308 Control Register is used to control the operation of the SQW/OUT pin.
BIT 7
OUT
BIT 6
X
BIT 5
X
BIT 4
SQWE
BIT 3
X
BIT 2
X
BIT 1
RS1
BIT 0
RS0
OUT (Output control): This bit controls the output level of the SQW/OUT pin when the square wave
output is disabled. If SQWE=0, the logic level on the SQW/OUT pin is 1 if OUT=1 and is 0 if OUT=0.
SQWE (Square Wave Enable): This bit, when set to a logic 1, will enable the oscillator output. The
frequency of the square wave output depends upon the value of the RS0 and RS1 bits.
RS (Rate Select): These bits control the frequency of the square wave output when the square wave
output has been enabled. Table 1 lists the square wave frequencies that can be selected with the RS bits.
SQUAREWAVE OUTPUT FREQUENCY
Table 1
RS1
0
0
1
1
RS0
0
1
0
1
SQW OUTPUT
FREQUENCY
1 Hz
4.096 kHz
8.192 kHz
32.768 kHz
2-WIRE SERIAL DATA BUS
The DS1307 supports a bi-directional 2-wire bus and data transmission protocol. A device that sends
data onto the bus is defined as a transmitter and a device receiving data as a receiver. The device that
controls the message is called a master. The devices that are controlled by the master are referred to as
slaves. The bus must be controlled by a master device which generates the serial clock (SCL), controls
the bus access, and generates the START and STOP conditions. The DS1307/DS1308 operates as a slave
on the 2-wire bus. A typical bus configuration using this 2-wire protocol is show in Figure 4.
TYPICAL 2-WIRE BUS CONFIGURATION
Figure 4
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