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DS1012M-2 参数 Datasheet PDF下载

DS1012M-2图片预览
型号: DS1012M-2
PDF下载: 下载PDF文件 查看货源
内容描述: [Silicon Delay Line, 2-Func, 1-Tap, True Output, CMOS, PDIP8, 0.300 INCH, DIP-8]
分类和应用: 光电二极管逻辑集成电路延迟线
文件页数/大小: 7 页 / 53 K
品牌: DALLAS [ DALLAS SEMICONDUCTOR ]
 浏览型号DS1012M-2的Datasheet PDF文件第1页浏览型号DS1012M-2的Datasheet PDF文件第2页浏览型号DS1012M-2的Datasheet PDF文件第3页浏览型号DS1012M-2的Datasheet PDF文件第5页浏览型号DS1012M-2的Datasheet PDF文件第6页浏览型号DS1012M-2的Datasheet PDF文件第7页  
DS1012
TEST SETUP DESCRIPTION
Figure 2 illustrates the hardware configuration used for
measuring the timing parameters on the DS1012. The
input waveform is produced by a precision pulse gener-
ator under software control connected to the inputs by
VHF switch control units. Time delays are measured by
a time interval counter (20 ps resolution) connected be-
tween the inputs and the outputs. Outputs are con-
nected to the counter by a VHF switch control unit. All
measurements are fully automated, with each instru-
ment controlled by a central computer over an IEEE 488
bus.
TEST CONDITIONS
INPUT:
Ambient Temperature:
Supply Voltage (V
CC
):
Input Pulse:
Source Impedance:
Rise and Fall Time:
Pulse Width:
Period:
25°C
±
3°C
5.0V
±
0.1V
High = 3.0V
±
0.1V
Low = 0.0V
±
0.1V
50 ohms max.
3.0 ns max.
50 ns
100 ns
OUTPUT:
Each output is loaded with a 74F04. Delay is measured
between the 1.5V level of the rising edge of the input sig-
nal and the 1.5V level of the corresponding edge of the
output.
NOTE:
These conditions are for test only and do
not restrict the operation of the device un-
der other data sheet conditions.
021798 4/7