Spec. No. : C705Q8
Issued Date : 2007.08.22
Revised Date :
CYStech Electronics Corp.
Page No. : 10/12
Current Address Read : A current address read operation is initiated by issuing R/W=1 in the device
address word(refer to Figure 9). Since the internal address counter maintains the last address incremented
by one accessed during the last read or write operation, the internal address counter will always retain the
last address incremented by one.
Random Read : To access a different address location that the one currently stored in the internal counter,
a random read operation is provided. The random read is actually a combination of a “dummy” byte write
sequence with a current address read command (refer to Figure 10). The “dummy” byte write loads a
different address into the internal counter, and the data can then be accessed using the current address read.
Sequential Read : In order to access subsequent data word after a current address read or random read has
been initiated, the user should send an acknowledgement to the EEPROM chip after each data byte received.
If an acknowledgement is not received, then the chip will not send any more data and expect a STOP
condition on the next cycle to reset back to standby mode(refer to Figure 11).
Sequential reads can be used to perform an entire chip read. Unlike the page write operation, the internal
counter will increment to the next row after the last byte of the page has been reached. When the address
reaches the last byte of the last memory page, the next address will increment to the 1st byte of the 1st
memory page.
Once the memory address limit is reached, the data word address will “roll over” and the sequential read
will continue. When the microcontroller does not respond with a zero but does generate a following stop
condition, the sequential read operation is terminated.
Figure 9. Current Address Read
CTK24BC01-16Q8
CYStek Product Specification
CYSTEKEC [ CYSTECH ELECTONICS CORP. ]
