CY8C29x66 Final Data Sheet
3. Electrical Specifications
3.4.4
AC Low Power Comparator Specifications
The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V
and -40
°
C
≤
T
A
≤
85
°
C, 3.0V to 3.6V and -40
°
C
≤
T
A
≤
85
°
C, or 2.4V to 3.0V and -40
°
C
≤
T
A
≤
85
°
C, respectively. Typical parameters
apply to 5V at 25
°
C and are for design guidance only.
Table 3-21. AC Low Power Comparator Specifications
Symbol
Description
Min
Typ
Max
Units
μ
s
Notes
≥
50 mV overdrive comparator reference set
within V
REFLPC
.
T
RLPC
LPC response time
–
–
50
3.4.5
AC Digital Block Specifications
The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V
and -40
°
C
≤
T
A
≤
85
°
C, or 3.0V to 3.6V and -40
°
C
≤
T
A
≤
85
°
C, respectively. Typical parameters apply to 5V and 3.3V at 25
°
C and
are for design guidance only.
Table 3-22: AC Digital Block Specifications
Function
Description
Min
Typ
Max
Units
Notes
All
Functions
Timer
Maximum Block Clocking Frequency (> 4.75V)
Maximum Block Clocking Frequency (< 4.75V)
Capture Pulse Width
Maximum Frequency, No Capture
Maximum Frequency, With Capture
50
a
–
–
50
a
–
–
–
–
–
–
–
–
49.2
24.6
–
49.2
24.6
–
49.2
24.6
MHz
MHz
ns
MHz
MHz
ns
MHz
MHz
4.75V < Vdd < 5.25V.
3.0V < Vdd < 4.75V.
4.75V < Vdd < 5.25V.
Counter
Enable Pulse Width
Maximum Frequency, No Enable Input
Maximum Frequency, Enable Input
4.75V < Vdd < 5.25V.
Dead Band
Kill Pulse Width:
Asynchronous Restart Mode
Synchronous Restart Mode
Disable Mode
Maximum Frequency
20
50
a
50
a
–
–
–
–
–
50
a
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
49.2
49.2
24.6
8.2
4.1
–
24.6
49.2
24.6
49.2
ns
ns
ns
MHz
MHz
MHz
MHz
ns
ns
MHz
MHz
MHz
MHz
Maximum data rate at 3.08 MHz due to 8 x over
clocking.
Maximum data rate at 6.15 MHz due to 8 x over
clocking.
Maximum data rate at 3.08 MHz due to 8 x over
clocking.
Maximum data rate at 6.15 MHz due to 8 x over
clocking.
Maximum data rate at 4.1 MHz due to 2 x over
clocking.
4.75V < Vdd < 5.25V.
4.75V < Vdd < 5.25V.
CRCPRS
Maximum Input Clock Frequency
(PRS Mode)
CRCPRS
Maximum Input Clock Frequency
(CRC Mode)
SPIM
SPIS
Maximum Input Clock Frequency
Maximum Input Clock Frequency
Width of SS_ Negated Between Transmissions
Transmitter
Maximum Input Clock Frequency
Vdd
≥
4.75V, 2 Stop Bits
Receiver
Maximum Input Clock Frequency
Vdd
≥
4.75V, 2 Stop Bits
–
–
a. 50 ns minimum input pulse width is based on the input synchronizers running at 24 MHz (42 ns nominal period).
August 5, 2008
Document No. 38-12013 Rev. *J
34
CYPRESS [ CYPRESS SEMICONDUCTOR ]
