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CY8C29666-24PVXI 参数 Datasheet PDF下载

CY8C29666-24PVXI图片预览
型号: CY8C29666-24PVXI
PDF下载: 下载PDF文件 查看货源
内容描述: 的PSoC ™混合信号阵列 [PSoC® Mixed-Signal Array]
分类和应用: 多功能外围设备微控制器和处理器光电二极管时钟
文件页数/大小: 49 页 / 632 K
品牌: CYPRESS [ CYPRESS SEMICONDUCTOR ]
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CY8C29x66 Final Data Sheet
3. Electrical Specifications
3.3
3.3.1
DC Electrical Characteristics
DC Chip-Level Specifications
The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V
and -40°C
T
A
85°C, or 3.0V to 3.6V and -40°C
T
A
85°C, respectively. Typical parameters apply to 5V and 3.3V at 25°C and
are for design guidance only.
Table 3-4: DC Chip-Level Specifications
Symbol
Description
Min
Typ
Max
Units
Notes
Vdd
I
DD
Supply Voltage
Supply Current
3.00
8
5.25
14
V
mA
See DC POR and LVD specifications, Table 3-
15 on page 27.
Conditions are 5.0V, T
A
= 25
o
C, CPU = 3 MHz,
SYSCLK doubler disabled, VC1 = 1.5 MHz, VC2
= 93.75 kHz, VC3 = 0.366 kHz.
Conditions are Vdd = 3.3V, T
A
= 25
o
C, CPU = 3
MHz, SYSCLK doubler disabled, VC1 = 1.5
MHz, VC2 = 93.75 kHz, VC3 = 0.366 kHz.
Conditions are Vdd = 3.3V, T
A
= 25
o
C, CPU =
0.75 MHz, SYSCLK doubler disabled, VC1 =
0.375 MHz, VC2 = 23.44 kHz, VC3 = 0.09 kHz.
Conditions are with internal slow speed oscilla-
tor, Vdd = 3.3V, -40
o
C
T
A
55
o
C.
Conditions are with internal slow speed oscilla-
tor, Vdd = 3.3V, 55
o
C < T
A
85
o
C.
Conditions are with properly loaded, 1
μ
W max,
32.768 kHz crystal. Vdd = 3.3V, -40
o
C
T
A
55
o
I
DD3
Supply Current
5
9
mA
I
DDP
Supply current when IMO = 6 MHz using SLIMO mode.
2
3
mA
I
SB
I
SBH
I
SBXTL
Sleep (Mode) Current with POR, LVD, Sleep Timer, WDT,
and internal slow oscillator active.
Sleep (Mode) Current with POR, LVD, Sleep Timer, WDT,
and internal slow oscillator active.
Sleep (Mode) Current with POR, LVD, Sleep Timer, WDT,
internal slow oscillator, and 32 kHz crystal oscillator active.
3
4
4
10
25
12
μ
A
μ
A
μ
A
C.
I
SBXTLH
Sleep (Mode) Current with POR, LVD, Sleep Timer, WDT,
and 32 kHz crystal oscillator active.
5
27
μ
A
Conditions are with properly loaded, 1
μ
W max,
32.768 kHz crystal. Vdd = 3.3V, 55
o
C < T
A
85
o
C.
V
REF
Reference Voltage (Bandgap)
1.28
1.3
1.32
V
Trimmed for appropriate Vdd.
3.3.2
DC General Purpose IO Specifications
The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V
and -40°C
T
A
85°C, or 3.0V to 3.6V and -40°C
T
A
85°C, respectively. Typical parameters apply to 5V and 3.3V at 25°C and
are for design guidance only.
Table 3-5: DC GPIO Specifications
Symbol
Description
Min
Typ
Max
Units
Notes
R
PU
R
PD
V
OH
Pull up Resistor
Pull down Resistor
High Output Level
4
4
Vdd - 1.0
5.6
5.6
8
8
k
Ω
k
Ω
V
IOH = 10 mA, Vdd = 4.75 to 5.25V (8 total loads,
4 on even port pins (for example, P0[2], P1[4]),
4 on odd port pins (for example, P0[3], P1[5])).
80 mA maximum combined IOH budget.
IOL = 25 mA, Vdd = 4.75 to 5.25V (8 total loads,
4 on even port pins (for example, P0[2], P1[4]),
4 on odd port pins (for example, P0[3], P1[5])).
150 mA maximum combined IOL budget.
Vdd = 3.0 to 5.25.
Vdd = 3.0 to 5.25.
Gross tested to 1
μ
A.
Package and pin dependent. Temp = 25
o
C.
Package and pin dependent. Temp = 25
o
C.
V
OL
Low Output Level
0.75
V
V
IL
V
IH
V
H
I
IL
C
IN
C
OUT
Input Low Level
Input High Level
Input Hysterisis
Input Leakage (Absolute Value)
Capacitive Load on Pins as Input
Capacitive Load on Pins as Output
2.1
60
1
3.5
3.5
0.8
V
V
10
10
mV
nA
pF
pF
August 5, 2008
Document No. 38-12013 Rev. *J
21