CY8C29x66 Final Data Sheet
1. Pin Information
1.1.5
100-Pin Part Pinout (On-Chip Debug)
The 100-pin TQFP part is for the CY8C29000 On-Chip Debug (OCD) PSoC device.
Note
OCD parts are only used for in-circuit debugging. OCD parts are NOT available for production
Table 1-6. 100-Pin OCD Part Pinout (TQFP)
Analog
Pin
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
Name
NC
NC
P0[1]
P2[7]
P2[5]
P2[3]
P2[1]
P4[7]
P4[5]
P4[3]
P4[1]
OCDE
OCDO
SMP
Vss
P3[7]
P3[5]
P3[3]
P3[1]
P5[7]
P5[5]
P5[3]
P5[1]
P1[7]
NC
NC
NC
P1[5]
P1[3]
P1[1]*
NC
Vdd
NC
Vss
NC
P7[7]
P7[6]
P7[5]
P7[4]
P7[3]
P7[2]
P7[1]
P7[0]
P1[0]*
P1[2]
P1[4]
P1[6]
NC
NC
NC
Description
No internal connection.
No internal connection.
Analog column mux input.
Pin
No.
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
IO
I
Power
Power
Power
Power
IO
IO
IO
IO
IO
IO
IO
IO
Analog
Digital
Digital
Name
NC
P5[0]
P5[2]
P5[4]
P5[6]
P3[0]
P3[2]
P3[4]
P3[6]
HCLK
CCLK
XRES
P4[0]
P4[2]
Vss
P4[4]
P4[6]
P2[0]
P2[2]
P2[4]
NC
P2[6]
NC
P0[0]
NC
NC
P0[2]
NC
P0[4]
NC
P0[6]
Vdd
Vdd
Vss
Vss
P6[0]
P6[1]
P6[2]
P6[3]
P6[4]
P6[5]
P6[6]
P6[7]
NC
P0[7]
NC
P0[5]
NC
P0[3]
NC
Description
No internal connection.
IO
IO
IO
IO
IO
IO
IO
IO
IO
I
I
I
Direct switched capacitor block input.
Direct switched capacitor block input.
IO
IO
IO
IO
IO
IO
IO
IO
Power
Power
IO
IO
IO
IO
IO
IO
IO
IO
IO
OCD even data IO
OCD odd data output
Switch Mode Pump (SMP) connection to
required external components.
Ground connection.
Input
IO
IO
Power
IO
IO
IO
I
IO
I
IO
IO
IO
I
OCD high speed clock output
OCD CPU clock output
Active high pin reset with internal pull down.
Ground connection.
IO
IO
IO
I2C Serial Clock (SCL)
No internal connection.
No internal connection.
No internal connection.
I2C Serial Data (SDA).
I
FMTEST
Crystal (XTALin), I2C Serial Clock (SCL),
TC
SCLK.
No internal connection.
Supply voltage.
No internal connection.
Ground connection.
No internal connection.
IO
IO
IO
IO
Direct switched capacitor block input.
Direct switched capacitor block input.
External Analog Ground (AGND) input.
No internal connection.
External Voltage Reference (VREF) input.
No internal connection.
Analog column mux input.
No internal connection.
No internal connection.
Analog column mux input and column output.
No internal connection.
Analog column mux input and column output,
V
REF
.
No internal connection.
Analog column mux input.
Supply voltage.
Supply voltage.
Ground connection.
Ground connection.
Power
Power
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
Crystal (XTALout), I2C Serial Data (SDA),
TC
SDATA
V
FMTEST
Optional External Clock Input (EXTCLK)
No internal connection.
No internal connection.
No internal connection.
No internal connection.
Analog column mux input.
No internal connection.
Analog column mux input and column output.
No internal connection.
Analog column mux input and column output.
No internal connection.
IO
IO
IO
I
IO
IO
LEGEND
A = Analog, I = Input, O = Output, NC = No Connection,
TC/TM: Test.
* ISSP pin which is not HiZ at POR.
August 5, 2008
Document No. 38-12013 Rev. *J
14
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