CY8C29x66 Final Data Sheet
1. Pin Information
1.1.4
Pin
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
100-Pin Part Pinout
Type
Table 1-5. 100-Pin Part Pinout (TQFP)
Digital
Analog
Name
NC
NC
P0[1]
P2[7]
P2[5]
P2[3]
P2[1]
P4[7]
P4[5]
P4[3]
P4[1]
NC
NC
SMP
Vss
P3[7]
P3[5]
P3[3]
P3[1]
P5[7]
P5[5]
P5[3]
P5[1]
P1[7]
NC
NC
NC
P1[5]
P1[3]
P1[1]
NC
Vdd
NC
Vss
NC
P7[7]
P7[6]
P7[5]
P7[4]
P7[3]
P7[2]
P7[1]
P7[0]
P1[0]
P1[2]
P1[4]
P1[6]
NC
NC
NC
Description
No connection.
No connection.
Analog column mux input.
Pin
No.
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
Type
Digital
IO
IO
IO
IO
IO
IO
IO
IO
Analog
Name
NC
P5[0]
P5[2]
P5[4]
P5[6]
P3[0]
P3[2]
P3[4]
P3[6]
NC
NC
XRES
P4[0]
P4[2]
No connection.
Description
IO
IO
IO
IO
IO
IO
IO
IO
IO
I
I
I
Direct switched capacitor block input.
Direct switched capacitor block input.
No connection.
No connection.
Switch Mode Pump (SMP) connection to
external components required.
Ground connection.
Input
IO
IO
Power
IO
IO
IO
IO
IO
IO
IO
I
No connection.
No connection.
Active high external reset with internal pull
down.
Power
Power
IO
IO
IO
IO
IO
IO
IO
IO
IO
I
I
IO
IO
IO
I2C Serial Clock (SCL).
No connection.
No connection.
No connection.
I2C Serial Data (SDA).
Crystal (XTALin), I2C Serial Clock (SCL),
ISSP-SCLK*.
No connection.
Supply voltage.
No connection.
Ground connection.
No connection.
IO
IO
IO
IO
Vss
P4[4]
P4[6]
P2[0]
P2[2]
P2[4]
NC
P2[6]
NC
P0[0]
NC
NC
P0[2]
NC
P0[4]
NC
P0[6]
Vdd
Vdd
Vss
Vss
P6[0]
P6[1]
P6[2]
P6[3]
P6[4]
P6[5]
P6[6]
P6[7]
NC
P0[7]
NC
P0[5]
NC
P0[3]
NC
Ground connection.
Direct switched capacitor block input.
Direct switched capacitor block input.
External Analog Ground (AGND).
No connection.
External Voltage Reference (VREF).
No connection.
Analog column mux input.
No connection.
No connection.
Analog column mux input and column output.
No connection.
Analog column mux input and column output.
No connection.
Analog column mux input.
Supply voltage.
Supply voltage.
Ground connection.
Ground connection.
IO
Power
Power
Power
Power
IO
IO
IO
IO
IO
IO
IO
IO
I
Power
Power
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
Crystal (XTALout), I2C Serial Data (SDA),
ISSP-SDATA*.
Optional External Clock Input (EXTCLK).
No connection.
No connection.
No connection.
No connection.
Analog column mux input.
No connection.
Analog column mux input and column output.
No connection.
Analog column mux input and column output.
No connection.
IO
IO
IO
I
IO
IO
LEGEND:
A = Analog, I = Input, and O = Output.
* These are the ISSP pins, which are not High Z at POR (Power On Reset). See the
PSoC Mixed-Signal Array Technical Reference Manual
for details.
August 5, 2008
Document No. 38-12013 Rev. *J
12
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