CY8C24x23A Final Data Sheet
PSoC® Overview
Analog blocks are arranged in a column of three, which
includes one CT (Continuous Time) and two SC (Switched
Capacitor) blocks, as shown in the figure below.
P0[7]
P0[5]
P0[3]
P0[1]
AGNDIn RefIn
P0[6]
P0[4]
P0[2]
P0[0]
Additional System Resources
System Resources, some of which have been previously listed,
provide additional capability useful to complete systems. Addi-
tional resources include a multiplier, decimator, switch mode
pump, low voltage detection, and power on reset. Statements
describing the merits of each system resource are below.
■
Digital clock dividers provide three customizable clock fre-
quencies for use in applications. The clocks can be routed to
both the digital and analog systems. Additional clocks can be
generated using digital PSoC blocks as clock dividers.
A multiply accumulate (MAC) provides a fast 8-bit multiplier
with 32-bit accumulate, to assist in both general math as well
as digital filters.
The decimator provides a custom hardware filter for digital
signal processing applications including the creation of Delta
Sigma ADCs.
The I2C module provides 100 and 400 kHz communication
over two wires. Slave, master, multi-master are supported.
Low Voltage Detection (LVD) interrupts can signal the appli-
cation of falling voltage levels, while the advanced POR
(Power On Reset) circuit eliminates the need for a system
supervisor.
An internal 1.3V reference provides an absolute reference for
the analog system, including ADCs and DACs.
An integrated switch mode pump (SMP) generates normal
operating voltages from a single 1.2V battery cell, providing a
low cost boost converter.
■
P2[6]
P2[3]
P2[4]
P2[2]
P2[0]
■
P2[1]
■
■
Array Input Configuration
■
ACI0[1:0]
ACI1[1:0]
■
Block Array
ACB00
ASC10
ASD20
ACB01
ASD11
ASC21
PSoC Device Characteristics
Depending on your PSoC device characteristics, the digital and
analog systems can have 16, 8, or 4 digital blocks and 12, 6, or
4 analog blocks. The following table lists the resources
available for specific PSoC device groups. The PSoC device
covered by this data sheet is highlighted below.
PSoC Device Characteristics
Analog
Columns
Analog
Outputs
Analog
Inputs
Analog
Blocks
Digital
Blocks
Digital
IO
Digital
Rows
SRAM
Size
2K
256
Bytes
1K
256
Bytes
256
Bytes
512
Bytes
256
Bytes
512
Bytes
PSoC Part
Number
Flash
Size
32K
16K
16K
4K
4K
8K
4K
8K
Analog Reference
Interface to
Digital System
RefHi
RefLo
AGND
Reference
Generators
AGNDIn
RefIn
Bandgap
CY8C29x66
CY8C27x43
CY8C24x94
CY8C24x23
CY8C24x23A
CY8C21x34
CY8C21x23
CY8C20x34
up to
64
up to
44
49
up to
24
up to
24
up to
28
16
up to
28
4
2
1
1
1
1
1
0
16
8
4
4
4
4
4
0
12
12
48
12
12
28
8
28
4
4
2
2
2
0
0
0
4
4
2
2
2
2
2
0
12
12
6
6
6
4
a
4
a
3
b
M8C Interface (Address Bus, Data Bus, Etc.)
Analog System Block Diagram
a.
Limited analog functionality
.
b. Two analog blocks and one CapSense.
October 17, 2006
Document No. 38-12028 Rev. *F
3
CYPRESS [ CYPRESS SEMICONDUCTOR ]
