CY8C24x23A Final Data Sheet
3. Electrical Specifications
3.3.2
DC General Purpose IO Specifications
The following tables list guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V
and -40°C
≤
T
A
≤
85°C, 3.0V to 3.6V and -40°C
≤
T
A
≤
85°C, or 2.4V to 3.0V and -40°C
≤
T
A
≤
85°C, respectively. Typical parameters
apply to 5V, 3.3V, and 2.7V at 25°C and are for design guidance only.
Table 3-5. 5V and 3.3V DC GPIO Specifications
Symbol
R
PU
R
PD
V
OH
Pull-up Resistor
Pull-down Resistor
High Output Level
Description
4
4
Vdd - 1.0
Min
Typ
5.6
5.6
–
8
8
–
Max
Units
kΩ
kΩ
V
IOH = 10 mA, Vdd = 4.75 to 5.25V (maximum
40 mA on even port pins (for example, P0[2],
P1[4]), maximum 40 mA on odd port pins (for
example, P0[3], P1[5])). 80 mA maximum com-
bined IOH budget.
IOL = 25 mA, Vdd = 4.75 to 5.25V (maximum
100 mA on even port pins (for example, P0[2],
P1[4]), maximum 100 mA on odd port pins (for
example, P0[3], P1[5])). 150 mA maximum com-
bined IOL budget.
Vdd = 3.0 to 5.25.
Vdd = 3.0 to 5.25.
Gross tested to 1
µA.
Package and pin dependent. Temp = 25
o
C.
Package and pin dependent. Temp = 25
o
C.
Notes
V
OL
Low Output Level
–
–
0.75
V
V
IL
V
IH
V
H
I
IL
C
IN
C
OUT
Input Low Level
Input High Level
Input Hysterisis
Input Leakage (Absolute Value)
Capacitive Load on Pins as Input
Capacitive Load on Pins as Output
–
2.1
–
–
–
–
–
–
60
1
3.5
3.5
0.8
V
V
–
–
10
10
mV
nA
pF
pF
Table 3-6. 2.7V DC GPIO Specifications
Symbol
R
PU
R
PD
V
OH
Pull-up Resistor
Pull-down Resistor
High Output Level
Description
4
4
Vdd - 0.4
Min
Typ
5.6
5.6
–
8
8
–
Max
Units
kΩ
kΩ
V
IOH = 2 mA (6.25 Typ), Vdd = 2.4 to 3.0V (16
mA maximum, 50 mA Typ combined IOH bud-
get).
IOL = 11.25 mA, Vdd = 2.4 to 3.0V (90 mA max-
imum combined IOL budget).
Vdd = 2.4 to 3.0.
Vdd = 2.4 to 3.0.
Gross tested to 1
µA.
Package and pin dependent. Temp = 25
o
C.
Package and pin dependent. Temp = 25
o
C.
Notes
V
OL
V
IL
V
IH
V
H
I
IL
C
IN
C
OUT
Low Output Level
Input Low Level
Input High Level
Input Hysteresis
Input Leakage (Absolute Value)
Capacitive Load on Pins as Input
Capacitive Load on Pins as Output
–
–
2.0
–
–
–
–
–
–
–
90
1
3.5
3.5
0.75
0.75
–
–
–
10
10
V
V
V
mV
nA
pF
pF
October 17, 2006
Document No. 38-12028 Rev. *F
20
CYPRESS [ CYPRESS SEMICONDUCTOR ]
