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CY8C24794-24LFXI 参数 Datasheet PDF下载

CY8C24794-24LFXI图片预览
型号: CY8C24794-24LFXI
PDF下载: 下载PDF文件 查看货源
内容描述: 的PSoC ™混合信号阵列 [PSoC㈢ Mixed-Signal Array]
分类和应用:
文件页数/大小: 48 页 / 648 K
品牌: CYPRESS [ CYPRESS SEMICONDUCTOR ]
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CY8C24094, CY8C24794, CY8C24894, and CY8C24994 Final Data Sheet
3. Electrical Specifications
3.4.5
AC Low Power Comparator Specifications
The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V
and -40°C
T
A
85°C, 3.0V to 3.6V and -40°C
T
A
85°C, or 2.4V to 3.0V and -40°C
T
A
85°C, respectively. Typical parameters
apply to 5V at 25°C and are for design guidance only.
Table 3-22. AC Low Power Comparator Specifications
Symbol
Description
Min
Typ
Max
Units
µ
s
Notes
50 mV overdrive comparator reference set
within V
REFLPC
.
T
RLPC
LPC response time
50
3.4.6
AC Digital Block Specifications
The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V
and -40°C
T
A
85°C, or 3.0V to 3.6V and -40°C
T
A
85°C, respectively. Typical parameters apply to 5V and 3.3V at 25°C and
are for design guidance only.
Table 3-23. AC Digital Block Specifications
Function
Description
Min
Typ
Max
Units
Notes
Timer
Capture Pulse Width
Maximum Frequency, No Capture
Maximum Frequency, With Capture
50
a
50
a
49.92
25.92
49.92
25.92
ns
MHz
MHz
ns
MHz
MHz
4.75V < Vdd < 5.25V.
4.75V < Vdd < 5.25V.
Counter
Enable Pulse Width
Maximum Frequency, No Enable Input
Maximum Frequency, Enable Input
Dead Band
Kill Pulse Width:
Asynchronous Restart Mode
Synchronous Restart Mode
Disable Mode
Maximum Frequency
20
50
a
50
a
50
a
49.92
49.92
24.6
8.2
4.1
24.6
24.6
ns
ns
ns
MHz
MHz
MHz
MHz
MHz
ns
MHz
MHz
Maximum data rate at 3.08 MHz due to 8 x over
clocking.
Maximum data rate at 3.08 MHz due to 8 x over
clocking.
Maximum data rate at 4.1 MHz due to 2 x over
clocking.
4.75V < Vdd < 5.25V.
4.75V < Vdd < 5.25V.
CRCPRS
Maximum Input Clock Frequency
(PRS Mode)
CRCPRS
Maximum Input Clock Frequency
(CRC Mode)
SPIM
SPIS
Maximum Input Clock Frequency
Maximum Input Clock Frequency
Width of SS_ Negated Between Transmissions
Transmitter
Receiver
Maximum Input Clock Frequency
Maximum Input Clock Frequency
a. 50 ns minimum input pulse width is based on the input synchronizers running at 24 MHz (42 ns nominal period).
3.4.7
AC External Clock Specifications
The following tables list guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V
and -40°C
T
A
85°C, or 3.0V to 3.6V and -40°C
T
A
85°C, respectively. Typical parameters apply to 5V and 3.3V at 25°C and
are for design guidance only.
Table 3-24. AC External Clock Specifications
Symbol
Description
Min
Typ
Max
Units
Notes
F
OSCEXT
Frequency for USB Applications
Duty Cycle
Power up to IMO Switch
23.94
47
150
24
50
24.06
53
MHz
%
µ
s
February 15, 2007
Document No. 38-12018 Rev. *J
35