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CY7C68013A-56LTXCT 参数 Datasheet PDF下载

CY7C68013A-56LTXCT图片预览
型号: CY7C68013A-56LTXCT
PDF下载: 下载PDF文件 查看货源
内容描述: EZ- USB FX2LP USB微控制器,高速USB外设控制器 [EZ-USB FX2LP USB Microcontroller High Speed USB Peripheral Controller]
分类和应用: 微控制器
文件页数/大小: 62 页 / 1626 K
品牌: CYPRESS [ CYPRESS ]
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CY7C68013A, CY7C68014A  
CY7C68015A, CY7C68016A  
EZ-USB FX2LP™ USB Microcontroller  
High Speed USB Peripheral Controller  
GPIF (General Programmable Interface)  
1. Features (CY7C68013A/14A/15A/16A)  
Enables direct connection to most parallel interfaces  
USB 2.0 USB IF High Speed Certified (TID # 40460272)  
Programmable waveform descriptors and configuration  
registers to define waveforms  
Single Chip Integrated USB 2.0 Transceiver, Smart SIE, and  
Enhanced 8051 Microprocessor  
Supports multiple Ready (RDY) inputs and Control (CTL)  
outputs  
Fit, Form, and Function Compatible with the FX2  
Integrated, Industry Standard Enhanced 8051  
Pin compatible  
Object code compatible  
Functionally compatible (FX2LP is a superset)  
48 MHz, 24 MHz, or 12 MHz CPU operation  
Four clocks per instruction cycle  
Two USARTs  
Three counter/timers  
Expanded interrupt system  
Two data pointers  
Ultra Low Power: ICC No More than 85 mA in any Mode  
Ideal for bus and battery powered applications  
Software: 8051 Code Runs from:  
3.3V Operation with 5V Tolerant Inputs  
Internal RAM, which is downloaded through USB  
Internal RAM, which is loaded from EEPROM  
External memory device (128 pin package)  
Vectored USB Interrupts and GPIF/FIFO Interrupts  
Separate Data Buffers for the Setup and Data Portions of a  
CONTROL Transfer  
16 KBytes of On-Chip Code/Data RAM  
Integrated I2C Controller, Runs at 100 or 400 kHz  
Four Programmable BULK, INTERRUPT, and  
ISOCHRONOUS Endpoints  
Four Integrated FIFOs  
Buffering options: double, triple, and quad  
Integrated glue logic and FIFOs lower system cost  
Automatic conversion to and from 16-bit buses  
Master or slave operation  
Uses external clock or asynchronous strobes  
Easy interface to ASIC and DSP ICs  
Additional Programmable (BULK/INTERRUPT) 64 Byte  
Endpoint  
8-Bit or 16-Bit External Data Interface  
Smart Media Standard ECC Generation  
Available in Commercial and Industrial Temperature Grade  
(all packages except VFBGA)  
Cypress Semiconductor Corporation  
Document #: 38-08032 Rev. *N  
198 Champion Court  
San Jose  
,
CA 95134-1709  
408-943-2600  
Revised July 01, 2009  
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