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CY7C65640A-LFXC 参数 Datasheet PDF下载

CY7C65640A-LFXC图片预览
型号: CY7C65640A-LFXC
PDF下载: 下载PDF文件 查看货源
内容描述: TetraHub ™高速USB集线器控制器 [TetraHub™ High Speed USB Hub Controller]
分类和应用: 控制器
文件页数/大小: 23 页 / 745 K
品牌: CYPRESS [ CYPRESS SEMICONDUCTOR ]
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CY7C65640A
Functional Overview
The Cypress TetraHub USB 2.0 Hub is a high-performance,
low-system-cost solution for USB. The TetraHub USB 2.0 Hub
integrates 1.5k upstream pull-up resistors for full speed
operation and all downstream 15k pull-down resistors as well as
series termination resistors on all upstream and downstream D+
and D– pins. This results in optimization of system costs by
providing built-in support for the USB 2.0 specification.
the host through the Status Change Endpoint (endpoint 1). Upon
receipt of SetPortReset command from the host, the hub will
Drive SE0 on the corresponding port
Put the port in an enabled state
Enable the green port indicator for that port (if not previously
overridden by the host)
Enable babble detection once the port is enabled.
System Initialization
On power-up, the TetraHub will read an external SPI EEPROM
for configuration information. At the most basic level, this
EEPROM will have the Vendor ID (VID), Product ID (PID), and
Device ID (DID) for the customer's application. For more
specialized applications, other configuration options can be
specified. See section for more details.
After reading the EEPROM, if BUSPOWER (connected to
up-stream VBus) is HIGH, TetraHub will enable the pull-up
resistor on the D+ to indicate that it is connected to the upstream
hub, after which a USB Bus Reset is expected. During this reset,
TetraHub will initiate a chirp to indicate that it is a high speed
peripheral. In a USB 2.0 system, the upstream hub will respond
with a chirp sequence, and TetraHub will be in a high speed
mode, with the upstream D+ pull-up resistor turned off. In USB
1.x systems, no such chirp sequence from the upstream hub will
be seen, and TetraHub will operate as a normal 1.x hub
(operating at full speed).
Babble consists of either unterminated traffic from a downstream
port (or loss of activity), or a non-idle condition on the port after
EOF2. If babble is detected on an enabled port, that port will be
disabled. A ClearPortEnable command from the host will also
disable the specified port.
Downstream ports can be individually suspended by the host
with the SetPortSuspend command. If the hub is not suspended,
any resume will be confined to that individual port and reflected
to the host through a port change indication in the Hub Status
Change Endpoint. If the hub is suspended, a resume on this port
will be forwarded to the host, but other resume events will not be
seen on that port. The host may resume the port by sending a
ClearPortSuspend command.
Upstream Port
The upstream port includes the transmitter and the receiver state
machine. The Transmitter and Receiver operate in high speed
and full speed depending on the current hub configuration.
The transmitter state machine monitors the upstream facing port
while the Hub Repeater has connectivity in the upstream
direction. This monitoring activity prevents propagation of
erroneous indications in the upstream direction. In particular, this
machine prevents babble and disconnect events on the
downstream facing ports of this hub from propagating and
causing the hub to be disabled or disconnected by the hub to
which it is attached. This allows the Hub to only disconnect the
offensive port on detecting a babble from it.
Enumeration
After a USB Bus Reset, TetraHub is in an unaddressed, uncon-
figured state (configuration value set to 0). During the enumer-
ation process, the host will set the hub's address and configu-
ration by sending a SetCongfiguration request. Changing the
hub address will restore it to an unconfigured state.
For high speed multi-TT support, the host must also set the
alternate interface setting to 1 (the default mode is single-TT).
Once the hub is configured, the full hub functionality is available.
Power Switching
TetraHub includes interface signals for external port power
switches. Both ganged and individual (per-port) configurations
are supported, with individual switching being the default. Initially
all ports are unpowered. After enumerating, the host may power
each port by sending a SetPortPower command for that port.
The power switching and over-current detection of downstream
ports is managed by control pins connected to an external power
switch device. PWR [n]# output pins of the CY7C65640A series
are connected to the respective external power switch's port
power enable signals. (Note that each port power output pin of
the external power switch must be bypassed with an electrolytic
or tantalum capacitor as required by the USB specification.
These capacitors supply the inrush currents, which occur during
downstream device hot-attach events.)
Multiple Transaction Translator Support
After TetraHub is configured in a high speed system, it will be in
Single TT mode. The host may then set the hub into Multiple TT
mode by sending a SetInterface command. In Multiple TT mode,
each full speed port is handled independently and thus has a full
12-Mbps bandwidth available. In Single TT mode, all traffic from
the host destined for full- or low-speed ports will be forwarded to
all of those ports. This means that the 12-Mbps bandwidth is
shared by all full- and low-speed ports.
Downstream Ports
TetraHub supports a maximum of four downstream ports, each
of which may be marked as usable or removable in the extended
configuration (0xD2 EEPROM load, see section ). Downstream
D+ and D– pull-down resistors are incorporated in TetraHub for
each port. Prior to the hub being configured, the ports are driven
SE0 (Single Ended Zero, where both D+ and D– are driven LOW)
and are set to the unpowered state. Once the hub is configured,
the ports are not driven, and the host may power the ports by
sending a SetPortPower command to each port. After a port is
powered, any connect or disconnect event is detected by the
hub. Any change in the port state is reported by the hub back to
Document #: 38-08019 Rev. *J
Over-current Detection
Over-current detection includes timed detection of 8 ms by
default. This parameter is configured from the external EEPROM
in a range of 0 ms to 15 ms for both an enabled port and a
disabled port individually. Detection of over-current on
downstream ports is managed by control pins connected to an
external power switch device.
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