FOR
FOR
enCoRe™
USB
CY7C63221/31A
CY7C63231A/
CY7C63221A-XC
5.0
Pin Assignments (continued)
Name
XTALIN/P2.1
XTALOUT/P2.2
V
PP
V
CC
VREG/P2.0
V
SS
I/O
IN
IN
16-Pin
8
9
6
10
7
5
18-Pin/Pad
9
10
7
11
8
6
Description
6-MHz ceramic resonator or external clock input, or P2.1 input
6-MHz ceramic resonator return pin or internal oscillator output,
or P2.2 input
Programming voltage supply, ground for normal operation
Voltage supply
Voltage supply for 1.3-kΩ USB pull-up resistor (3.3V nominal).
Also serves as P2.0 input.
Ground
6.0
Programming Model
Refer to the
CYASM Assembler User’s Guide
for more details on firmware operation with the microcontrollers.
6.1
Program Counter (PC)
The 14-bit program counter (PC) allows access for 3 Kbytes of EPROM using the architecture. The program counter is cleared
during reset, such that the first instruction executed after a reset is at address 0x0000. This is typically a jump instruction to a
reset handler that initializes the application.
The lower 8 bits of the program counter are incremented as instructions are loaded and executed. The upper 6 bits of the program
counter are incremented by executing an XPAGE instruction. As a result, the last instruction executed within a 256-byte “page”
of sequential code should be an XPAGE instruction. The assembler directive “XPAGEON” will cause the assembler to insert
XPAGE instructions automatically. As instructions can be either one or two bytes long, the assembler may occasionally need to
insert a NOP followed by an XPAGE for correct execution.
The program counter of the next instruction to be executed, carry flag, and zero flag are saved as two bytes on the program stack
during an interrupt acknowledge or a CALL instruction. The program counter, carry flag, and zero flag are restored from the
program stack only during a RETI instruction.
Please note the program counter cannot be accessed directly by the firmware. The program stack can be examined by reading
SRAM from location 0x00 and up.
Note that there are restrictions in using the JMP, CALL, and INDEX instructions across the 4-KB boundary of the program memory.
Refer to the
CYASM Assembler User’s Guide
for a detailed description.
6.2
8-bit Accumulator (A)
The accumulator is the general-purpose, do-everything register in the architecture where results are usually calculated.
6.3
8-bit Index Register (X)
The index register “X” is available to the firmware as an auxiliary accumulator. The X register also allows the processor to perform
indexed operations by loading an index value into X.
6.4
8-bit Program Stack Pointer (PSP)
During a reset, the program stack pointer (PSP) is set to zero. This means the program “stack” starts at RAM address 0x00 and
“grows” upward from there. Note that the program stack pointer is directly addressable under firmware control, using the MOV
PSP,A instruction. The PSP supports interrupt service under hardware control and CALL, RET, and RETI instructions under
firmware control.
During an interrupt acknowledge, interrupts are disabled and the program counter, carry flag, and zero flag are written as two
bytes of data memory. The first byte is stored in the memory addressed by the program stack pointer, then the PSP is incremented.
The second byte is stored in memory addressed by the program stack pointer and the PSP is incremented again. The net effect
is to store the program counter and flags on the program “stack” and increment the program stack pointer by two.
The return from interrupt (RETI) instruction decrements the program stack pointer, then restores the second byte from memory
addressed by the PSP. The program stack pointer is decremented again and the first byte is restored from memory addressed
by the PSP. After the program counter and flags have been restored from stack, the interrupts are enabled. The effect is to restore
the program counter and flags from the program stack, decrement the program stack pointer by two, and re-enable interrupts.
Document #: 38-08028 Rev. *B
Page 8 of 50
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