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CY7C68013A-56BAXCT 参数 Datasheet PDF下载

CY7C68013A-56BAXCT图片预览
型号: CY7C68013A-56BAXCT
PDF下载: 下载PDF文件 查看货源
内容描述: EZ- USB FX2LP USB微控制器,高速USB外设控制器 [EZ-USB FX2LP USB Microcontroller High-Speed USB Peripheral Controller]
分类和应用: 微控制器
文件页数/大小: 66 页 / 909 K
品牌: CYPRESS [ CYPRESS SEMICONDUCTOR ]
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CY7C68013A, CY7C68014A
CY7C68015A, CY7C68016A
2.18 I
2
C Controller
FX2LP has one I
2
C port that is driven by two internal controllers,
one that automatically operates at boot time to load VID/PID/DID
and configuration information, and another that the 8051 uses
when running to control external I
2
C devices. The I
2
C port
operates in master mode only.
2.18.1 I
2
C Port Pins
The I
2
C pins SCL and SDA must have external 2.2 k pull up
resistors even if no EEPROM is connected to the FX2LP.
External EEPROM device address pins must be configured
properly. See
for configuring the device address pins.
Table 7. Strap Boot EEPROM Address Lines to These Values
Bytes
16
128
256
4K
8K
16K
Example EEPROM
24LC00
24LC01
24LC02
24LC32
24LC64
24LC128
A2
N/A
0
0
0
0
0
A1
N/A
0
0
0
0
0
A0
N/A
0
0
1
1
1
For designers migrating from the FX2 to the FX2LP a change in
the bill of material and review of the memory allocation (due to
increased internal memory) is required. For more information
about migrating from EZ-USB FX2 to EZ-USB FX2LP, see the
application note titled
Migrating from EZ-USB FX2 to EZ-USB
FX2LP
available in the
Table 8. Part Number Conversion Table
EZ-USB FX2
Part Number
CY7C68013-56PVC
EZ-USB FX2LP
Part Number
Package
Description
CY7C68013A-56PVXC or 56-pin
CY7C68014A-56PVXC
SSOP
CY7C68013-56PVCT CY7C68013A-56PVXCT or 56-pin
CY7C68014A-56PVXCT SSOP –
Tape and
Reel
CY7C68013-56LFC
CY7C68013-100AC
CY7C68013-128AC
CY7C68013A-56LFXC or 56-pin QFN
CY7C68014A-56LFXC
CY7C68013A-100AXC or 100-pin
CY7C68014A-100AXC
TQFP
CY7C68013A-128AXC or 128-pin
CY7C68014A-128AXC
TQFP
2.18.2 I
2
C Interface Boot Load Access
At power on reset the
interface boot loader loads the
VID/PID/DID configuration bytes and up to 16 KBytes of
program/data. The available RAM spaces are 16 KBytes from
0x0000–0x3FFF and 512 bytes from 0xE000–0xE1FF. The 8051
is in reset. I
2
C interface boot loads only occur after power on
reset.
2.18.3 I
2
C Interface General-Purpose Access
The 8051 can control peripherals connected to the I
2
C bus using
the I
2
CTL and I2DAT registers. FX2LP provides I
2
C master
control only, it is never an I
2
C slave.
I
2
C
2.20 CY7C68013A/14A and CY7C68015A/16A
Differences
CY7C68013A is identical to CY7C68014A in form, fit, and
functionality. CY7C68015A is identical to CY7C68016A in form,
fit, and functionality. CY7C68014A and CY7C68016A have a
lower suspend current than CY7C68013A and CY7C68015A
respectively and are ideal for power sensitive battery
applications.
CY7C68015A and CY7C68016A are available in 56-pin QFN
package only. Two additional GPIO signals are available on the
CY7C68015A and CY7C68016A to provide more flexibility when
neither IFCLK or CLKOUT are needed in the 56-pin package.
USB developers wanting to convert their FX2 56-pin application
to a bus-powered system directly benefit from these additional
signals. The two GPIOs give developers the signals they need
for the power control circuitry of their bus-powered application
without pushing them to a high pincount version of FX2LP.
The CY7C68015A is only available in the 56-pin QFN package
Table 9. CY7C68013A/14A and CY7C68015A/16A
Pin Differences
CY7C68013A/CY7C68014A
IFCLK
CLKOUT
CY7C68015A/CY7C68016A
PE0
PE1
2.19 Compatible with Previous Generation
EZ-USB FX2
The EZ-USB FX2LP is form, fit and with minor exceptions
functionally compatible with its predecessor, the EZ-USB FX2.
This makes for an easy transition for designers wanting to
upgrade their systems from the FX2 to the FX2LP. The pinout
and package selection are identical and a vast majority of
firmware previously developed for the FX2 functions in the
FX2LP.
Note
9. This EEPROM does not have address pins.
Document #: 38-08032 Rev. *V
Page 14 of 66