CY7C64713/14
4.11
Register Addresses
FFFF
4 KBytes EP2-EP8
buffers
(8 x 512)
Not all Space is available
for all transfer types
F000
EFFF
2 KBytes RESERVED
E800
E7FF
E7C0
E7BF
E780
E77F
E740
64 Bytes EP1IN
64 Bytes EP1OUT
64 Bytes EP0 IN/OUT
64 Bytes RESERVED
8051 Addressable Registers
(512)
Reserved (128)
128 bytes GPIF Waveforms
Reserved (512)
E73F
E700
E6FF
E500
E4FF
E480
E47F
E400
E3FF
E200
E1FF
512 bytes
8051 xdata RAM
E000
4.12
Endpoint RAM
4.12.1 Size
• 3 × 64 bytes (Endpoints 0 and 1)
• 8 × 512 bytes (Endpoints 2, 4, 6, 8)
4.12.2 Organization
• EP0—Bidirectional endpoint zero, 64-byte buffer
• EP1IN, EP1OUT—64-byte buffers, bulk or interrupt
• EP2,4,6,8—Eight 512-byte buffers, bulk, interrupt, or isoch-
ronous, of which only the transfer size is available.
EP4 and EP8 can be double buffered, while EP2 and 6 can
be either double, triple, or quad buffered. Regardless of the
physical size of the buffer, each endpoint buffer accommo-
dates only one full-speed packet. For bulk endpoints the
maximum number of bytes it can accommodate is 64, even
though the physical buffer size is 512 or 1024. For an
ISOCHRONOUS endpoint the maximum number of bytes
it can accommodate is 1023. For endpoint configuration
options, see
Figure 4-5.
4.12.3
Setup Data Buffer
A separate 8-byte buffer at 0xE6B8-0xE6BF holds the Setup
data from a CONTROL transfer.
Document #: 38-08039 Rev. *B
Page 8 of 50
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