FOR
FOR
enCoRe™
USB CY7C63722/23
CY7C63743
Port 2.0
VREG Enable
3.3V
Regulator
V
CC
PS/2 Pull-up
Enable
5 kΩ
5 kΩ
D+/SCLK
D–/SDATA
200Ω
VREG
1.3 kΩ
USB - PS/2
Driver
Port 2.5
Port 2.4
On-chip
Off-chip
Figure 16-1. Diagram of USB-PS/2 System Connections
17.0
Serial Peripheral Interface (SPI)
SPI is a four-wire, full-duplex serial communication interface between a master device and one or more slave devices. The
CY7C637xx SPI circuit supports byte serial transfers in either Master or Slave modes. The block diagram of the SPI circuit is
shown in
The block contains buffers for both transmit and receive data for maximum flexibility and throughput. The
CY7C637xx can be configured as either an SPI Master or Slave. The external interface consists of Master-Out/Slave-In (MOSI),
Master-In/Slave-Out (MISO), Serial Clock (SCK), and Slave Select (SS).
SPI modes are activated by setting the appropriate bits in the SPI Control Register, as described below.
Data Bus
Write
TX Buffer
Master
/ Slave
Control
MOSI
MISO
SCK
RX Buffer
4
8 bit shift register
SS
Internal SCK
Data Bus
Read
Figure 17-1. SPI Block Diagram
Document #: 38-08022 Rev. **
Page 28 of 58
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