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CY7C63001C-SXC 参数 Datasheet PDF下载

CY7C63001C-SXC图片预览
型号: CY7C63001C-SXC
PDF下载: 下载PDF文件 查看货源
内容描述: 通用串行总线的微控制器 [Universal Serial Bus Microcontroller]
分类和应用: 微控制器
文件页数/大小: 28 页 / 1077 K
品牌: CYPRESS [ CYPRESS ]
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CY7C63001C  
CY7C63101C  
7.0  
Absolute Maximum Ratings  
Storage Temperature .................................65°C to +150°C  
Ambient Temperature with Power Applied......0°C to +70°C  
Supply Voltage on VCC Relative to VSS ......... –0.5V to +7.0V  
DC Input Voltage................................... –0.5V to +VCC+0.5V  
DC Voltage Applied to Outputs in High-Z state –0.5V to +VCC+0.5V  
Max. Output Current into Port 1 Pins...........................60 mA  
Max. Output Current into Non-Port 1 Pins .................. 10 mA  
Power Dissipation .....................................................300 mW  
Static Discharge Voltage ...........................................>2000V  
Latch-up Current[1].................................................. >200 mA  
8.0  
Electrical Characteristics fOSC = 6 MHz; Operating Temperature = 0 to 70°C, VCC = 4.0 to 5.25 volts  
Parameter  
General  
Min  
Max  
Units  
Conditions  
ICC  
VCC Operating Supply Current  
Supply Current—Suspend Mode  
Supply Current—Start-up Mode  
Programming Voltage (disabled)  
Resonator Start-up Interval  
Watch Dog Timer Period  
25  
20  
4
mA  
µA  
mA  
V
ISB1  
Resonator off, D– > Voh min[2]  
Ceramic resonator  
ISB2  
VPP  
tstart  
twatch  
–0.4  
0.4  
256  
µs  
7.168 8.192  
ms  
Power On Reset  
[3, 4]  
tVCCS  
VCC Slew  
0.010  
2.8  
1000  
ms  
Linear ramp on VCC pin to VCC  
USB Interface  
Static Output High  
Voh  
Vol  
3.6  
0.3  
V
V
15k± 5% to Gnd[5,6]  
See Notes 5 and 6  
|(D+)–(D–)|, and Figure 6-23  
Figure 6-23  
Static Output Low  
Vdi  
Differential Input Sensitivity  
0.2  
0.8  
0.8  
V
Vcm  
Vse  
Cin  
Differential Input Common Mode Range  
Single Ended Receiver Threshold  
Transceiver Input Capacitance  
Data Line (D+, D–) Leakage  
External Bus Pull-up Resistance, D– pin  
External Bus Pull-up Resistance, D– pin  
External Bus Pull-down Resistance  
2.5  
2.0  
20  
V
V
pF  
µA  
kΩ  
kΩ  
kΩ  
D+ to Vss; D- to Vss  
Ilo  
–10  
10  
0 V <(D+, D–)<3.3 V, Hi-Z State  
1.5 k± 5% to 3.3V supply  
7.5 k± 1% to Vcc[7]  
15 k± 5%  
Rpu1  
Rpu2  
1.425 1.575  
7.425 7.575  
14.25 15.75  
Rpd  
Notes:  
1. All pins specified for >200 mA positive and negative injection, except P1.0 is specified for >50 mA negative injection.  
2. Cext at V or Gnd, Port 0 and Port1 at V  
.
CC  
CC  
3. Part powers up in suspend mode, able to be reset by USB Bus Reset.  
4. POR may re-occur whenever V drops to approximately 2.5V.  
CC  
5. Level guaranteed for range of V = 4.35V to 5.25V.  
CC  
6. With R  
of 1.5 KW±5% on D– to 3.3V regulator.  
pu1  
7. Maximum matched capacitive loading allowed on D+ and D– (including USB cable and host/hub) is approximately 230 pF.  
Document #: 38-08026 Rev. *B  
Page 20 of 28  
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