CY7C1347F
Maximum Ratings
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature
..................................... −65°C
to +150°C
Ambient Temperature with
Power Applied..................................................
−55°C
to +125°C
Supply Voltage on V
DD
Relative to GND.........−0.5V to +4.6V
DC Voltage Applied to Outputs
in High-Z State
........................................... −0.5V
to V
DD
+ 0.5V
DC Input Voltage
....................................... −0.5V
to V
DD
+ 0.5V
Current into Outputs (LOW)......................................... 20 mA
Static Discharge Voltage.......................................... > 2001V
(per MIL-STD-883, Method 3015)
Latch-up Current.................................................... > 200 mA
Operating Range
Range
Com’l
Ind’l
Ambient
Temperature
0°C to +70°C
–40°C to +85°C
V
DD
3.3V
−5%/+10%
V
DDQ
2.5V
−5%
to V
DD
Electrical Characteristics
Over the Operating Range
[8, 9]
Parameter
V
DD
V
DDQ
V
OH
V
OL
V
IH
V
IL
I
X
Description
Power Supply Voltage
I/O Supply Voltage
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
[8]
Input LOW
Voltage
[8]
V
DDQ
= 3.3V, V
DD
= Min., I
OH
= –4.0 mA
V
DDQ
= 2.5V, V
DD
= Min., I
OH
= –2.0 mA
V
DDQ
= 3.3V, V
DD
= Min., I
OL
= 8.0 mA
V
DDQ
= 2.5V, V
DD
= Min., I
OL
= 2.0 mA
V
DDQ
= 3.3V
V
DDQ
= 2.5V
V
DDQ
= 3.3V
V
DDQ
= 2.5V
Input Load Current ex-
cept ZZ and MODE
GND
≤
V
I
≤
V
DDQ
2.0
1.7
–0.3
–0.3
−5
−30
5
−5
30
−5
4-ns cycle, 250 MHz
4.4-ns cycle, 225 MHz
5-ns cycle, 200 MHz
6-ns cycle, 166 MHz
7.5-ns cycle, 133 MHz
I
SB1
Automatic CE
Power-down
Current—TTL Inputs
Max. V
DD
, Device Deselected,
V
IN
≥
V
IH
or V
IN
≤
V
IL
f = f
MAX
= 1/t
CYC
4-ns cycle, 250 MHz
4.4-ns cycle, 225 MHz
5-ns cycle, 200 MHz
6-ns cycle, 166 MHz
7.5-ns cycle, 133 MHz
I
SB2
All speeds
Automatic CE
Max. V
DD
, Device Deselected,
Power-down
V
IN
≤
0.3V or V
IN
> V
DDQ
– 0.3V, f
Current—CMOS Inputs = 0
5
325
290
265
240
225
120
115
110
100
90
40
Test Conditions
Min.
3.135
2.375
2.4
2.0
0.4
0.7
V
DD
+ 0.3V
V
DD
+ 0.3V
0.8
0.7
5
Max.
3.6
V
DD
Unit
V
V
V
V
V
V
V
V
V
V
µA
µA
µA
µA
µA
µA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
Input Current of MODE Input = V
SS
Input = V
DDQ
Input Current of ZZ
I
OZ
I
DD
Input = V
SS
Input = V
DDQ
Output Leakage Current GND
≤
V
I
≤
V
DDQ,
Output Disabled
V
DD
Operating Supply
Current
V
DD
= Max., I
OUT
= 0 mA,
f = f
MAX
= 1/t
CYC
Notes:
8. Overshoot: V
IH
(AC) < V
DD
+1.5V (Pulse width less than t
CYC
/2), undershoot: V
IL
(AC) > -2V (Pulse width less than t
CYC
/2).
9. T
Power-up
: Assumes a linear ramp from 0v to V
DD
(min.) within 200ms. During this time V
IH
< V
DD
and V
DDQ
< V
DD
Document #: 38-05213 Rev. *D
Page 8 of 19
CYPRESS [ CYPRESS SEMICONDUCTOR ]
