CY7C024/024A/0241
CY7C025/0251
Electrical Characteristics
Over the Operating Range (continued)
Parameter
I
CC
I
SB1
I
SB2
I
SB3
Description
Operating Current
Test Conditions
V
CC
= Max, I
OUT
= 0 mA,
Outputs Disabled
Com’l
Ind
Com’l
Ind
Com’l
Ind
Com’l
Ind
Com’l
Ind
7C024/024A/0241–35 7C024/024A/0241–55
7C025/0251–35
7C025/0251–55
Unit
Min
Typ
Max
Min
Typ
Max
160
160
30
30
85
85
3
3
80
80
230
260
50
65
135
150
15
15
120
135
150
150
20
20
75
75
3
3
70
70
230
260
50
65
135
150
15
15
120
135
mA
mA
mA
mA
mA
Standby Current
CE
L
and CE
R
≥
V
IH
,
(Both Ports TTL Levels) f = f
MAX[12]
Standby Current
(One Port TTL Level)
Standby Current
(Both Ports CMOS
Levels)
Standby Current
(Both Ports CMOS
Levels)
CE
L
or CE
R
≥
V
IH
,
f = f
MAX[12]
Both Ports CE and CE
R
≥
V
CC
– 0.2V, V
IN
≥
V
– 0.2V
or V
IN
≤
0.2V, f = 0
One Port CE
L
or
CE
R
≥
V
CC
– 0.2V,
V
IN
≥
V
CC
– 0.2V or V
IN
≤
0.2V,
Active Port Outputs, f = f
MAX[12]
I
SB4
Capacitance
Parameter
C
IN
C
OUT
Description
Input Capacitance
Output Capacitance
Test Conditions
T
A
= 25
×
C, f = 1 MHz,
V
CC
= 5.0V
Max
10
10
Unit
pF
pF
Figure 3. AC Test Loads and Waveforms
5V
R1 = 893Ω
OUTPUT
C = 30 pF
R2 = 347Ω
V
TH
= 1.4V
R
TH
= 250Ω
OUTPUT
C = 30pF
C = 5 pF
R2 = 347Ω
5V
R1 = 893Ω
OUTPUT
(a) Normal Load (Load 1)
(b) Thévenin Equivalent (Load 1)
ALL INPUT PULSES
(c) Three-State Delay (Load 3)
OUTPUT
C = 30 pF
3.0V
GND
10%
≤
3 ns
90%
90%
10%
≤
3 ns
Load (Load 2)
Note
13. Tested initially and after any design or process changes that may affect these parameters.
Document #: 38-06035 Rev. *D
Page 8 of 21
CYPRESS [ CYPRESS SEMICONDUCTOR ]
