CY7C027V/028V
CY7C037V/038V
Switching Waveforms
(continued)
Interrupt Timing Diagrams
Left Side Sets INT
R
:
ADDRESS
L
CE
L
R/W
L
INT
R
t
INS
[41]
t
WC
WRITE 7FFF (FFFF for CY7C028V/38V)
t
HA
[40]
Right Side Clears INT
R
:
ADDRESS
R
CE
R
t
INR
[41]
R/W
R
OE
R
INT
R
t
RC
READ 7FFF
(FFFF for CY7C028V/38V)
Right Side Sets INT
L
:
t
WC
ADDRESS
R
CE
R
R/W
R
INT
L
t
INS
[41]
WRITE 7FFE (FFFE for CY7C028V/38V)
t
HA
[40]
Left Side Clears INT
L
:
ADDRESS
R
CE
L
t
INR
[41]
R/W
L
OE
L
INT
L
Notes:
40. t
HA
depends on which enable pin (CE
L
or R/W
L
) is deasserted first.
41. t
INS
or t
INR
depends on which enable pin (CE
L
or R/W
L
) is asserted last.
t
RC
READ 7FFE
(FFFF for CY7C028V/38V)
Document #: 38-06078 Rev. *A
Page 14 of 18