CY7B991
CY7B992
Pin Definitions
Signal
Name
REF
FB
FS
1F0, 1F1
2F0, 2F1
3F0, 3F1
4F0, 4F1
TEST
1Q0, 1Q1
2Q0, 2Q1
3Q0, 3Q1
4Q0, 4Q1
V
CCN
V
CCQ
GND
I/O
I
I
I
I
I
I
I
I
O
O
O
O
PWR
PWR
PWR
Description
Reference frequency input. This input supplies the frequency and timing against which all functional
variation is measured.
PLL feedback input (typically connected to one of the eight outputs).
Three-level frequency range select. See
Table 1.
Three-level function select inputs for output pair 1 (1Q0, 1Q1). See
Table 2.
Three-level function select inputs for output pair 2 (2Q0, 2Q1). See
Table 2.
Three-level function select inputs for output pair 3 (3Q0, 3Q1). See
Table 2.
Three-level function select inputs for output pair 4 (4Q0, 4Q1). See
Table 2.
Three-level select. See test mode section under the block diagram descriptions.
Output pair 1. See
Table 2.
Output pair 2. See
Table 2.
Output pair 3. See
Table 2.
Output pair 4. See
Table 2.
Power supply for output drivers.
Power supply for internal circuitry.
Ground.
(xF0, xF1) inputs.
Table 2
below shows the nine possible out-
put functions for each section as determined by the function
select inputs. All times are measured with respect to the REF
input assuming that the output connected to the FB input has
0t
U
selected.
Table 2. Programmable Skew Configurations
[1]
Function Selects
1F1, 2F1,
3F1, 4F1
LOW
LOW
LOW
MID
MID
MID
HIGH
HIGH
Approximate
Frequency (MHz) At
Which t
U
= 1.0 ns
22.7
38.5
62.5
HIGH
1F0, 2F0,
3F0, 4F0
LOW
MID
HIGH
LOW
MID
HIGH
LOW
MID
HIGH
Output Functions
1Q0, 1Q1,
2Q0, 2Q1
–4t
U
–3t
U
–2t
U
–1t
U
0t
U
+1t
U
+2t
U
+3t
U
+4t
U
3Q0, 3Q1
–6t
U
–4t
U
–2t
U
0t
U
+2t
U
+4t
U
+6t
U
Divide by 4
4Q0, 4Q1
–6t
U
–4t
U
–2t
U
0t
U
+2t
U
+4t
U
+6t
U
Inverted
Block Diagram Description
Phase Frequency Detector and Filter
These two blocks accept inputs from the reference frequency
(REF) input and the feedback (FB) input and generate correc-
tion information to control the frequency of the Voltage-Con-
trolled Oscillator (VCO). These blocks, along with the VCO,
form a Phase-Locked Loop (PLL) that tracks the incoming
REF signal.
VCO and Time Unit Generator
The VCO accepts analog control inputs from the PLL filter
block and generates a frequency that is used by the time unit
generator to create discrete time units that are selected in the
skew select matrix. The operational range of the VCO is de-
termined by the FS control pin. The time unit (t
U
) is determined
by the operating frequency of the device and the level of the
FS pin as shown in
Table 1.
Table 1. Frequency Range Select and t
U
Calculation
[1]
f
NOM
(MHz)
FS
[2, 3]
Min. Max.
LOW
MID
HIGH
15
25
40
30
50
80
1
t
U
=
-----------------------
-
f
NOM
×
N
Divide by 2 Divide by 2
where N =
44
26
16
Skew Select Matrix
The skew select matrix is comprised of four independent sec-
tions. Each section has two low-skew, high-fanout drivers
(xQ0, xQ1), and two corresponding three-level function select
Notes:
1. For all three-state inputs, HIGH indicates a connection to V
CC
, LOW
indicates a connection to GND, and MID indicates an open connection.
Internal termination circuitry holds an unconnected input to V
CC
/2.
2. The level to be set on FS is determined by the “normal” operating fre-
quency (f
NOM
) of the V
CO
and Time Unit Generator (see Logic Block
Diagram). Nominal frequency (f
NOM
) always appears at 1Q0 and the
other outputs when they are operated in their undivided modes (see
Table 2).
The frequency appearing at the REF and FB inputs will be f
NOM
when the output connected to FB is undivided. The frequency of the REF
and FB inputs will be f
NOM
/2 or f
NOM
/4 when the part is configured for a
frequency multiplication by using a divided output as the FB input.
3. When the FS pin is selected HIGH, the REF input must not transition
upon power-up until V
CC
has reached 4.3V.
Document #: 38-07138 Rev. **
Page 2 of 15
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