CY7B991
CY7B992
Switching Characteristics
Over the Operating Range
[2, 13]
(continued)
CY7B991–7
Parameter
f
NOM
Description
Operating Clock
Frequency in MHz
FS = LOW
[1, 2]
FS = MID
[1, 2]
FS = HIGH
[1, 2]
t
RPWH
t
RPWL
t
U
t
SKEWPR
t
SKEW0
t
SKEW1
t
SKEW2
t
SKEW3
t
SKEW4
t
DEV
t
PD
t
ODCV
t
PWH
t
PWL
t
ORISE
t
OFALL
t
LOCK
t
JR
REF Pulse Width HIGH
REF Pulse Width LOW
Programmable Skew Unit
Zero Output Matched-Pair Skew
(XQ0, XQ1)
[16, 17]
Zero Output Skew (All Outputs)
[16, 18]
Output Skew (Rise-Rise, Fall-Fall, Same
Class Outputs)
[16, 20]
Output Skew (Rise-Fall, Nominal-Inverted,
Divided-Divided)
[16, 20]
Output Skew (Rise-Rise, Fall-Fall, Different
Class Outputs)
[16, 20]
Output Skew (Rise-Fall, Nominal-Divided,
Divided-Inverted)
[16, 20]
Device-to-Device Skew
[14, 21]
Propagation Delay, REF Rise to FB Rise
Output Duty Cycle Variation
[22]
Output HIGH Time Deviation from 50%
[23, 24]
Output LOW Time Deviation from 50%
[23, 24]
Output Rise Time
[23, 25]
Output Fall Time
[23, 25]
CY7B992–7
Max.
30
50
80
Min.
15
25
40
5.0
5.0
See
Table 1
Typ.
Max.
30
50
80
[15]
ns
ns
0.1
0.3
0.6
1.0
0.7
1.2
0.25
0.75
1.0
1.5
1.2
1.7
1.65
–0.7
–1.5
0.0
0.0
+0.7
+1.5
5.5
5.5
0.5
0.5
3.0
3.0
5.0
5.0
0.5
25
200
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
ps
ps
Unit
MHz
Min.
15
25
40
5.0
5.0
Typ.
0.1
0.3
0.6
1.0
0.7
1.2
0.25
0.75
1.0
1.5
1.2
1.7
1.65
–0.7
–1.2
0.0
0.0
+0.7
+1.2
3
3.5
0.15
0.15
RMS
[14]
Peak-to-Peak
[14]
1.5
1.5
2.5
2.5
0.5
25
200
PLL Lock Time
[26]
Cycle-to-Cycle Output
Jitter
Document #: 38-07138 Rev. **
Page 8 of 15
CYPRESS [ CYPRESS SEMICONDUCTOR ]
