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CY28800OXCT 参数 Datasheet PDF下载

CY28800OXCT图片预览
型号: CY28800OXCT
PDF下载: 下载PDF文件 查看货源
内容描述: 100 - MHz差分缓冲器,用于PCI Express和SATA [100-MHz Differential Buffer for PCI Express and SATA]
分类和应用: PC
文件页数/大小: 16 页 / 328 K
品牌: CYPRESS [ CYPRESS SEMICONDUCTOR ]
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CY28800
1 ms
SRC_STP
PWRDWN
DIFT(Free Running
DIFC(Free Running
DIFT (Stoppable)
DIFC (Stoppable)
Figure 9. SRC_STP = Driven, PWRDWN = Driven, OE_INV = 1
1 ms
SRC_STP
PWRDWN
DIFT(Free Running
DIFC(Free Running
DIFT (Stoppable)
DIFC (Stoppable)
Figure 10. SRC_STP = Tri-state, PWRDWN = Driven, OE_INV = 1
1 ms
SRC_STP
PWRDWN
DIFT(Free Running
DIFC(Free Running
DIFT (Stoppable)
DIFC (Stoppable)
Figure 11. SRC_STP = Tri-state, PWRDWN = Tri-state, OE_INV = 1
Output Enable Clarification
OE functionality allows for enabling and disabling individual
outputs. OE_[7:0] are Active High or Active Low inputs
depending on the strapped value of the OE_INV input.
Disabling the outputs may be implemented in two ways, via
writing a ‘0’ to SMBus register bit corresponding to output of
interest or by deasserting the OE input pin. In both methods,
if SMBus registered bit has been written low or the OE pin is
deasserted or both, the output of interest will be tri-stated. (The
assertion and deassertion of this signal is absolutely
asynchronous.)
Table 6. OE Functionality
OE_INV
0
0
0
0
1
1
1
1
OE (Pin)
0
0
1
1
0
0
1
1
OE (SMBus Bit)
0
1
0
1
0
1
0
1
DIF[T/C]
Tri-State
Tri-State
Tri-State
Enabled
Tri-State
Enabled
Tri-State
Tri-State
Document #: 38-07723 Rev *B
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