CY7C138
CY7C139
Switching Waveforms
(continued)
Busy Timing Diagram No. 1 (CE Arbitration)
CE
L
Valid First:
ADDRESS
L,R
CE
L
t
PS
CE
R
t
BLC
BUSY
R
C138-17
[29]
ADDRESS MATCH
t
BHC
CE
R
Valid First:
ADDRESS
L,R
CE
R
t
PS
CE
L
t
BLC
BUSY
L
C138-18
ADDRESS MATCH
t
BHC
Busy Timing Diagram No. 2 (Address Arbitration)
Left Address Valid First:
t
RC
or t
WC
ADDRESS
L
ADDRESS MATCH
t
PS
ADDRESS
R
t
BLA
BUSY
R
[29]
ADDRESS MISMATCH
t
BHA
C138-19
Right Address Valid First:
t
RC
or t
WC
ADDRESS
R
ADDRESS MATCH
t
PS
ADDRESS
L
t
BLA
BUSY
L
C138-20
ADDRESS MISMATCH
t
BHA
Note:
29. If t
PS
is violated, the busy signal will be asserted on one side or the other, but there is no guarantee on which side BUSY will be asserted.
10