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CY2305SC-1 参数 Datasheet PDF下载

CY2305SC-1图片预览
型号: CY2305SC-1
PDF下载: 下载PDF文件 查看货源
内容描述: 低成本3.3V零延迟缓冲器 [Low Cost 3.3V Zero Delay Buffer]
分类和应用:
文件页数/大小: 15 页 / 366 K
品牌: CYPRESS [ CYPRESS SEMICONDUCTOR ]
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CY2305, CY2309
Absolute Maximum Conditions
Supply Voltage to Ground Potential................–0.5V to +7.0V
DC Input Voltage (Except REF) ............ –0.5V to V
DD
+ 0.5V
DC Input Voltage REF .........................................–0.5V to 7V
Storage Temperature ................................. –65°C to +150°C
Junction Temperature ................................................. 150°C
Static Discharge Voltage
(per MIL-STD-883, Method 3015) ........................... > 2,000V
Operating Conditions for CY2305SC-XX and CY2309SC-XX Commercial Temperature Devices
Parameter
V
DD
T
A
C
L
C
L
C
IN
t
PU
Supply Voltage
Operating Temperature (Ambient Temperature)
Load Capacitance, below 100 MHz
Load Capacitance, from 100 MHz to 133 MHz
Input Capacitance
Power up time for all V
DD
s to reach minimum specified voltage (power
ramps must be monotonic)
Description
Min
3.0
0
0.05
Max
3.6
70
30
10
7
50
Unit
V
°C
pF
pF
pF
ms
Electrical Characteristics for CY2305SC-XX and CY2309SC-XX Commercial Temperature
Devices
Parameter
V
IL
V
IH
I
IL
I
IH
V
OL
V
OH
Description
Input LOW Voltage
Input HIGH Voltage
Input LOW Current
Input HIGH Current
Output LOW Voltage
Output HIGH Voltage
V
IN
= 0V
V
IN
= V
DD
I
OL
= 8 mA (–1)
I
OH =
12 mA (–1H)
I
OH
= –8 mA (–1)
I
OL
= –12 mA (–1H)
REF = 0 MHz
Unloaded outputs at 66.67 MHz,
SEL inputs at V
DD
Test Conditions
Min
2.0
2.4
Max
0.8
50.0
100.0
0.4
12.0
32.0
Unit
V
V
μA
μA
V
V
μA
mA
I
DD
(PD mode) Power Down Supply Current
I
DD
Supply Current
Switching Characteristics for CY2305SC-1 and CY2309SC-1 Commercial Temperature
Devices
Parameter
t1
t
DC
t3
t
4
t
5
t
6A
Name
Output Frequency
Duty Cycle
= t
2
÷
t
1
Rise Time
Fall Time
Output to Output Skew
Delay, REF Rising Edge to
CLKOUT Rising Edge
Test Conditions
30-pF load
10 pF load
Measured at 1.4V, F
out
= 66.67
MHz
Measured between 0.8V and 2.0V
Measured between 0.8V and 2.0V
All outputs equally loaded
Measured at V
DD
/2
Min
10
10
40.0
Typ.
50.0
85
0
Max
100
133.33
60.0
2.50
2.50
250
±350
Unit
MHz
MHz
%
ns
ns
ps
ps
Notes
5. REF input has a threshold voltage of V
DD
/2.
6. Parameter is guaranteed by design and characterization. Not 100% tested in production.
Document #: 38-07140 Rev. *J
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