CY2292
Electrical Characteristics, Industrial 5.0V
Parameter
VOH
VOL
VIH
VIL
IIH
IIL
IOZ
IDD
IDDS
Description
HIGH-Level Output Voltage
LOW-Level Output Voltage
HIGH-Level Input Voltage[9]
LOW-Level Input Voltage[9]
Input HIGH Current
Conditions
Min.
2.4
Typ.
Max.
Unit
V
V
V
V
µA
µA
µA
mA
µA
IOH = 4.0 mA
IOL = 4.0 mA
0.4
Except crystal pins
Except crystal pins
VIN = VDD – 0.5V
2.0
0.8
10
10
250
110
100
<1
<1
Input LOW Current
VIN = +0.5V
Output Leakage Current
Three-state outputs
VDD = VDD Max., 5V operation
Shutdown active CY2292I/CY2292FI
VDD Supply Current[10] Industrial
75
10
VDD Power Supply Current in
Shutdown Mode[10]
Electrical Characteristics, Industrial 3.3V
Parameter
Description
Conditions
Min.
2.4
Typ.
Max.
Unit
V
V
V
V
µA
µA
µA
mA
VOH
VOL
VIH
VIL
IIH
IIL
IOZ
IDD
HIGH-Level Output Voltage
LOW-Level Output Voltage
HIGH-Level Input Voltage[9]
LOW-Level Input Voltage[9]
Input HIGH Current
IOH = 4.0 mA
IOL = 4.0 mA
0.4
Except crystal pins
Except crystal pins
VIN = VDD – 0.5V
VIN = +0.5V
2.0
0.8
10
10
250
70
<1
<1
Input LOW Current
Output Leakage Current
Three-state outputs
VDD Supply Current[10] Indus- VDD = VDD Max., 3.3V operation
50
10
trial
IDDS
VDD Power Supply Current in Shutdown active
Shutdown Mode[10]
CY2292I/CY2292FI
100
µA
Switching Characteristics, Commercial 5.0V
Parameter
Name
Description
Min.
Typ.
Max.
Unit
t1
Output Period
Clock output range, 5V
CY2292
10
13000
ns
operation
(100 MHz)
(76.923 kHz)
CY2292F
11.1
13000
ns
(90 MHz)
(76.923 kHz)
[12]
[12]
Output Duty Cycle[11]
Duty cycle for outputs, defined as t2 ÷ t1
40%
45%
50%
50%
60%
55%
fOUT > 66 MHz
Duty cycle for outputs, defined as t2 ÷ t1
fOUT < 66 MHz
t3
t4
t5
Rise Time
Fall Time
Output Disable Time
Output clock rise time[13]
Output clock fall time[13]
3
2.5
10
5
4
15
ns
ns
ns
Time for output to enter three-state mode
after SHUTDOWN/OE goes LOW
t6
t7
Output Enable Time
Skew
Time for output to leave three-state mode
after SHUTDOWN/OE goes HIGH
10
15
0.5
ns
ns
Skew delay between any identical or
< 0.25
related outputs[3, 12, 14]
t8
CPUCLK Slew
Frequency transition rate
1.0
20.0
MHz/ms
Notes:
11. XBUF duty cycle depends on XTALIN duty cycle.
12. Measured at 1.4V.
13. Measured between 0.4V and 2.4V.
14. Jitter varies with configuration. All standard configurations sample tested at the factory conform to this limit. For more information on jitter, please refer to the
application note: Jitter in PLL-Based Systems.
Document #: 38-07449 Rev. *B
Page 5 of 11
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