Approved Product
C9870G
High Performance Pentium® 4 Clock Synthesizer
AC Parameters (Cont.)
Symbol
TDC
Tr / Tf
TSKEW
Tpd
TCCJ
Parameter
66B(0:2) Duty
Cycle
66B(0:2) rise and
fall times
Any 66B to any
66B Skew
66IN to 66B(0:2)
propagation delay
66B(0:2) Cycle to
Cycle Jitter
PCI_F(0:2) PCI
(0:6) Duty Cycle
PCI_F(0:2) PCI
(0:6) period
PCI_F(0:2) PCI
(0:6) high time
PCI_F(0:2) PCI
(0:6) low time
PCI_F(0:2) PCI
(0:6) rise and fall
times
Any PCI clock to
Any PCI clock
Skew
PCI_F(0:2) PCI
(0:6) Cycle to
Cycle Jitter
USB48M Duty
Cycle
USB48M period
USB48M rise and
fall times
USB48M Cycle to
Cycle Jitter
DOT48 Duty
Cycle
DOT48 period
DOT48 rise and
fall times
DOT48Cycle to
Cycle Jitter
66 MHz
Min
Max
45
0.5
-
2.5
-
55
2.0
175
4.5
100
100 MHz
Min
Max
45
0.5
-
2.5
-
55
2.0
175
4.5
100
133 MHz
Min
Max
45
0.5
-
2.5
-
55
2.0
175
4.5
100
200 MHz
Min
Max
45
0.5
55
2.0
175
2.5
-
4.5
100
Units
%
nS
pS
nS
pS
Notes
2, 4
2, 3
2, 4
2, 4
2, 4, 18
TDC
TPeriod
THIGH
TLOW
Tr / Tf
45
30.0
12.0
12.0
0.5
55
-
-
-
2.0
45
30.0
12.0
12.0
0.5
55
-
-
-
2.0
45
30.0
12.0
12.0
0.5
55
-
-
-
2.0
45
30
12.0
12.0
0.5
55
-
-
-
2.0
%
nS
nS
nS
nS
2, 4
1, 2, 4
19
20
3
TSKEW
-
500
-
500
-
500
-
500
pS
2, 4
TCCJ
-
250
-
250
-
250
-
250
pS
2, 4
TDC
TPeriod
Tr / Tf
TCCJ
45
20.8299
1.0
-
55
20.8333
2.0
350
45
20.8299
1.0
-
55
20.8333
2.0
350
45
20.8299
1.0
-
55
20.8333
2.0
350
45
20.8299
1.0
-
55
20.8333
2.10
350
%
nS
nS
pS
2, 4
2, 4
2, 3
1, 2, 4
TDC
TPeriod
Tr / Tf
TCCJ
45
20.837
0.5
-
55
45
20.837
0.5
-
55
45
20.837
0.5
-
55
45
20.837
0.5
-
55
%
nS
nS
pS
2, 4
2, 4
2, 4
2, 4
1.0
350
1.0
350
1.0
350
1.0
350
Cypress Semiconductor Corporation
http://www.cypress.com
Document#: 38-07108 Rev. *A
12/26/2002
Page 8 of 25