Approved Product
C9870G
High Performance Pentium® 4 Clock Synthesizer
VDD3 (3.3V +/- 5%)
Slope ~ 1/R0
Ro
Iout
Ros
0V
1.2V
Iout
Vout = 1.2V max
Vout
Host Clock (HCSL) Buffer Characteristics
Characteristic
Ro
Minimum
3000 Ohms (recommended)
Maximum
N/A
Ros
Vout
N/A
1.2V
Iout is selectable depending on implementation. The parameters above apply to all configurations. Vout is the voltage
at the pin of the device.
The various output current configurations are shown in the host swing select functions table. For all configurations, the
deviation from the expected output current is +/- 7% as shown in the current accuracy table.
CPU Clock Current Select Function
Mult0
Board Target Trace/Term Z
50 Ohms
Reference R, Iref – Vdd (3*Rr) Output Current Voh @ Z
0
1
Rr = 221 1%, Iref = 5.00mA
Rr = 475 1%, Iref = 2.32mA
Ioh = 4*Iref
Ioh = 6*Iref
1.0V @ 50
0.7V @ 50
50 Ohms
Cypress Semiconductor Corporation
http://www.cypress.com
Document#: 38-07108 Rev. *A
12/26/2002
Page 12 of 25
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