C9843
Clock Generator for Pentium
®
Systems with SDRAM Support
Preliminary
Serial Control Registers
Following the acknowledge of the Address Byte, two additional bytes must be sent:
1) “Command
Code
“ byte, and
2) “Byte
Count”
byte.
Although the data (bits) in these two bytes are considered “don’t care”; they must be sent and will be acknowledged.
After the Command Code and the Byte Count have been acknowledged, the sequence (Byte 0, Byte 1, and Byte 2)
described below will be valid and acknowledged.
Byte 0: 48M Clock Register
(1=Enable, 0=Disable)
Bit
7
6
5
4
3
2
1
0
@Pup
0
0
0
0
0
1
1
0
Pin#
-
-
-
-
-
1
2
-
Description
Set to 0
SEL2
SEL1
SEL0
Spread spectrum mode (0=on,
1=off)
2V48M(DOT)
3V48M(USB)
0=frequency from Sel(0:2)
2
1=I C register select
Byte 1: SDRAM Clock Register
(1=Enable, 0=Disable)
Bit
7
6
5
4
3
2
1
0
@Pup
1
1
1
1
1
1
1
1
Pin#
30
31
34
35
38
39
40
43
Description
SDRAM7
SDRAM6
SDRAM5
SDRAM4
SDRAM3
SDRAM2
SDRAM1
SDRAM0
Byte 2: PCI Clock Register
(1=Enable, 0=Disable)
Bit
7
6
5
4
3
2
1
0
@Pup
0
0
1
1
1
1
1
1
Pin#
22
21
18
17
16
15
12
11
Description
Reserved. Set to 0
Reserved. Set to 0
PCI5
PCI4
PCI3
PCI2
PCI1
PCI0
Byte 3: SSCG & Test Mode Control Register (1 = Enable, 0 =
Disable)
Bit
7
6
5
4
3
2
1
0
@Pup
0
0
1
0
0
0
0
0
Pin#
-
-
-
-
-
-
-
-
Description
SST1
SST0
SSTD
Set to 0
Set to 0
Mode
Reserved. Set to 0
Reserved. Set to 0
Byte 4: VCH Clock Register
(1=Enable, 0=Disable)
Bit
7
6
5
4
3
2
1
0
@Pup
0
0
0
0
0
0
0
0
Pin#
-
-
-
-
-
-
-
-
Description
Reserved. Set to 0
Reserved. Set to 0
Reserved. Set to 0
Reserved. Set to 0
Reserved. Set to 0
Reserved. Set to 0
Reserved. Set to 0
Reserved. Set to 0
Byte 5: Dial –A- Frequency™ Control Register
(1 = Enable, 0 =
Disable)
Bit
7
6
5
4
3
2
1
0
@Pup
0
0
0
0
0
0
0
0
Pin#
-
-
-
-
-
-
-
-
Description
N7 bit (MSB)
N6 bit
N5 bit
N4 bit
N3 bit
N2 bit
N1 bit
N0 bit (LSB)
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST.
MILPITAS, CA 95035 TEL: 408-263-6300 FAX 408-263-6571
http://www.imicorp.com
Rev 1.0
3/30/2000
Page 9 of 13
CYPRESS [ CYPRESS SEMICONDUCTOR ]
