+/+…when timing is critical
C9836
Low EMI Clock Generator for Intel Mobile 133MHz/2 SO-DIMM Chipset Systems
Preliminary
PCI_STP# Timing
PCI_STP# is an input to the clock generator and is made synchronous to the clock driver PCI_F output. It is used to turn
off the PCI clocks for low power operation. PCI clocks are stopped in a low state and started such that a full high pulse
width is guaranteed. ONLY one rising edge of PCI_F occurs after the clock control logic switched for the PCI outputs to
become enabled/disabled.
PCI_STP# Timing Diagram
PCI_F
Tsu
Tsu
PCI_STP#
PCI(1:7)
CPU_STP#
PD#
(High)
(High)
Figure 3
Notes:
1. All internal timing is referenced to the CPU clock.
2. PCI_STP# signal is an input signal which must be made synchronous to PCI_F output.
3. All other clocks continue to run undisturbed.
4. PD# is understood to be in a high state.
5. Diagrams shown with respect to 133MHz. Similar operation when CPU is 100MHz.
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST.,
MILPITAS, CA 95035, USA TEL: 408-263-6300, FAX 408-263-6571
http://www.imicorp.com
Rev 1.0
3/30/2000
Page 6 of 20
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