+/+…when timing is critical
C9836
Low EMI Clock Generator for Intel Mobile 133MHz/2 SO-DIMM Chipset Systems
Preliminary
Serial Control Registers
Following the acknowledge of the Address Byte, two additional bytes must be sent:
1) “Command Code “ byte, and
2) “Byte Count” byte.
Although the data (bits) in these two bytes are considered “don’t care”; they must be sent and will be acknowledged.
After the Command Code and the Byte Count have been acknowledged, the sequence (Byte 0, Byte 1, and Byte 2)
described below will be valid and acknowledged.
Byte 0: CPU Clock Register (1=Enable, 0=Disable)
Byte 1: SDRAM Clock Register (1=Enable, 0=Disable)
Bit
7
6
5
4
3
2
1
0
@Pup
Pin#
-
-
41
43
-
24
-
Description
Bit
7
6
5
4
3
2
1
0
@Pup
Pin#
-
-
-
-
34
35
37
38
Description
1
1
1
1
0
1
1
0
Reserved. Don’t Care
Reserved. Don’t Care
CPU1
0
0
1
1
1
1
1
1
Reserved. Set to 0
Reserved. Set to 0
Reserved. Don’t Care
Reserved. Don’t Care
SDRAM3
SDRAM2
SDRAM1
SDRAM0
CPU0
Spread spectrum (1 = enabled)
48M1(DOT)
Reserved. Don’t Care
Reserved. Set to 0
-
Byte 2: 3V66 Clock Register (1=Enable, 0=Disable)
Byte 3: PCI Register (1 = Enable, 0 = Disable)
Bit
7
6
5
4
3
2
1
0
@Pup
Pin#
20
19
18
17
15
14
12
-
Description
PCI7
PCI6
PCI5
PCI4
PCI3
PCI2
PCI1
Bit
7
6
5
4
3
2
1
0
@Pup
Pin#
Description
3V66_2 (AGP)
3V66_1
1
1
1
1
1
1
1
0
1
1
1
0
0
0
0
0
8
7
6
-
-
-
3V66_0
Reserved. Set to 0
Reserved. Set to 0
Reserved. Set to 0
Reserved. Set to 0
Reserved. Set to 0
-
-
SDRAM 133MHz Mode Enable.
Default is disabled = ‘0’, enabled = ‘1’
Byte 4: Reserved Register (1=Enable, 0=Disable)
Byte 5: SSCG Control Register (1 = Enable, 0 = Disable)
Bit
7
6
5
4
3
2
1
0
@Pup
Pin#
Description
0
0
0
0
0
0
0
0
-
-
-
-
-
-
-
-
Reserved. Set to 0
Reserved. Set to 0
Reserved. Set to 0
Reserved. Set to 0
Reserved. Set to 0
Reserved. Set to 0
Reserved. Set to 0
Reserved. Set to 0
Bit
7
@Pup
Pin#
Description
0
0
0
0
0
0
0
-
-
-
-
-
-
-
Spread Mode (0=down, 1=center)
Selects spread bandwidth. See Table 5
Selects spread bandwidth. See Table 5
Reserved. Set to 0
6
5
4
3
Reserved. Set to 0
2
Reserved. Set to 0
1
ESEL1 Expanded Freq. Selection MSB,
See Table 2
0
0
-
ESEL0 Expanded Freq. Selection LSB,
See Table 2
Note: The Pin# column lists the relevant pin number where applicable. The @Pup column gives the default state at
power up.
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST.,
MILPITAS, CA 95035, USA TEL: 408-263-6300, FAX 408-263-6571
http://www.imicorp.com
Rev 1.0
3/30/2000
Page 10 of 20
CYPRESS [ CYPRESS ]
