BCM89359 Advance Data Sheet
PCM Interface
Short Frame Sync, Slave Mode
Figure 11: PCM Timing Diagram (Short Frame Sync, Slave Mode)
1
2
3
BT_PCM_CLK
4
5
BT_PCM_SYNC
BT_PCM_OUT
9
HIGH IMPEDANCE
8
6
7
BT_PCM_IN
Table 7: PCM Interface Timing Specifications (Short Frame Sync, Slave Mode)
Reference
Characteristics
Minimum Typical Maximum Unit
1
2
3
4
5
6
7
8
9
PCM bit clock frequency
PCM bit clock LOW
PCM bit clock HIGH
BT_PCM_SYNC setup
BT_PCM_SYNC hold
BT_PCM_OUT delay
BT_PCM_IN setup
–
–
–
–
–
–
–
–
–
–
12
–
MHz
ns
41
41
8
–
ns
–
ns
8
–
ns
0
25
–
ns
8
ns
BT_PCM_IN hold
8
–
ns
Delay from rising edge of BT_PCM_CLK
during last bit period to BT_PCM_OUT
becoming high impedance.
0
25
ns
Broadcom®
September 9, 2014 • 89359-DS100-R
Page 43
BROADCOM CONFIDENTIAL
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