BCM89359 Advance Data Sheet
SDIO Timing
Data Timing, DDR50 Mode
Figure 41: SDIO Data Timing (DDR50 Mode)
FPP
SDIO_CLK
tISU2x
tIH2x
tISU2x
tIH2x
DAT[3:0]
input
Invalid
Data
Invalid
Data
Invalid
Data
Invalid
tODLY2x (max)
tODLY2x (max)
tODLY2x
(min)
tODLY2x
(min)
Available timing
window for card
output transition
DAT[3:0]
output
Data
Data
Data
In DDR50 mode, DAT[3:0] lines are sampled on both edges of
the clock (not applicable for CMD line)
Available timing
window for host to
sample data from card
Table 56: SDIO Bus Timing Parameters (DDR50 Mode)
Parameter
Input CMD
Symbol
Minimum
Maximum
Unit Comments
Input setup time
Input hold time
t
t
6
–
–
ns
ns
C
C
< 10pF (1 Card)
ISU
CARD
0.8
< 10pF (1 Card)
IH
CARD
Output CMD
Output delay time
Output hold time
t
t
–
13.7
–
ns
ns
C
C
< 30pF (1 Card)
< 15pF (1 Card)
ODLY
OH
CARD
1.5
CARD
Input DAT
Input setup time
Input hold time
t
t
3
–
–
ns
ns
C
C
< 10pF (1 Card)
< 10pF (1 Card)
ISU2x
CARD
0.8
IH2x
CARD
Output DAT
Output delay time
Output hold time
t
t
–
7.5
–
ns
ns
C
C
< 25pF (1 Card)
< 15pF (1 Card)
ODLY2x
ODLY2x
CARD
1.5
CARD
Broadcom®
September 9, 2014 • 89359-DS100-R
Page 138
BROADCOM CONFIDENTIAL
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