欢迎访问ic37.com |
会员登录 免费注册
发布采购

BCM88335L2CUBG 参数 Datasheet PDF下载

BCM88335L2CUBG图片预览
型号: BCM88335L2CUBG
PDF下载: 下载PDF文件 查看货源
内容描述: [Telecom Circuit, 1-Func, PBGA145, WLBGA-145]
分类和应用: 电信电信集成电路
文件页数/大小: 140 页 / 2728 K
品牌: CYPRESS [ CYPRESS ]
 浏览型号BCM88335L2CUBG的Datasheet PDF文件第58页浏览型号BCM88335L2CUBG的Datasheet PDF文件第59页浏览型号BCM88335L2CUBG的Datasheet PDF文件第60页浏览型号BCM88335L2CUBG的Datasheet PDF文件第61页浏览型号BCM88335L2CUBG的Datasheet PDF文件第63页浏览型号BCM88335L2CUBG的Datasheet PDF文件第64页浏览型号BCM88335L2CUBG的Datasheet PDF文件第65页浏览型号BCM88335L2CUBG的Datasheet PDF文件第66页  
BCM88335 Data Sheet  
Generic SPI Mode  
Status  
The gSPI interface supports status notification to the host after a read/write transaction. This status notification  
provides information about any packet errors, protocol errors, information about available packet in the RX  
queue, etc. The status information helps in reducing the number of interrupts to the host. The status-reporting  
feature can be switched off using a register bit, without any timing overhead. The gSPI bus timing for read/write  
transactions with and without status notification are as shown in Figure 24 and Figure 25 on page 62. See  
Table 13 on page 62 for information on status field details.  
Figure 24: gSPI Signal Timing Without Status (32-bit Big Endian)  
Write  
cs  
sclk  
mosi  
C31C30
C1
Command 32 bits  
C0D31D30
D1D0
Write Data 16*n bits  
Write-Read  
cs  
sclk  
mosi  
miso  
C31C30
C0
C0
D31D30
D0
D1
Response  
Delay  
Command  
32 bits  
Read Data 16*n bits  
cs  
Read  
sclk  
mosi  
miso  
C31C30
D31D30
D0
Command  
32 bits  
Response  
Delay  
Read Data  
16*n bits  
Broadcom®  
September 23, 2015 • 88335-DS100-R  
Page 61  
BROADCOM CONFIDENTIAL  
 复制成功!