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BCM88335L2CUBG 参数 Datasheet PDF下载

BCM88335L2CUBG图片预览
型号: BCM88335L2CUBG
PDF下载: 下载PDF文件 查看货源
内容描述: [Telecom Circuit, 1-Func, PBGA145, WLBGA-145]
分类和应用: 电信电信集成电路
文件页数/大小: 140 页 / 2728 K
品牌: CYPRESS [ CYPRESS ]
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BCM88335 Data Sheet  
SDIO/gSPI Timing  
gSPI Signal Timing  
The gSPI host and device always use the rising edge of clock to sample data.  
Figure 43: gSPI Timing  
Table 52: gSPI Timing Parameters  
Parameter  
Symbol Minimum  
Maximum  
Units Note  
ns Fmax = 48 MHz  
Clock period  
T1  
20.8  
Clock high/low  
Clock rise/fall timea  
T2/T3  
T4/T5  
(0.45 × T1) – T4 (0.55 × T1) – T4 ns  
2.5  
ns  
ns  
ns  
ns  
ns  
Measured from 10% to 90% of  
VDDIO  
Input setup time  
Input hold time  
T6  
T7  
5.0  
5.0  
5.0  
5.0  
Setup time, SIMO valid to  
SPI_CLK active edge  
Hold time, SPI_CLK active edge  
to SIMO invalid  
Output setup time T8  
Setup time, SOMI valid before  
SPI_CLK rising  
Output hold time  
T9  
Hold time, SPI_CLK active edge  
to SOMI invalid  
CSX to clockb  
Clock to CSXa  
7.86  
ns  
ns  
CSX fall to 1st rising edge  
Last falling edge to CSX high  
a. Limit applies when SPI_CLK = F  
. For slower clock speeds, longer rise/fall times are acceptable provided that  
max  
the transitions are monotonic and the setup and hold time limits are complied with.  
b. SPI_CSx remains active for entire duration of gSPI read/write/write-read transaction (overall words for multiple-  
word transaction).  
Broadcom®  
September 23, 2015 • 88335-DS100-R  
Page 130  
BROADCOM CONFIDENTIAL