PRELIMINARY
CYW54907
Document History Page
Document Title: CYW54907 WICED™ IEEE 802.11 a/b/g/n/ac SoC with an Embedded Applications Processor
Document Number: 002-19312
Orig. of
Change
Submission
Date
Revision
ECN
Description of Change
**
5742421
5812137
UTSV
UTSV
05/19/2017 New datasheet.
*A
07/12/2017 Updated 5.7.2.SDIO 3.0—Host Mode on page 20.
Added:
Note: JTAG_SEL is exposed on a dedicated physical pin.
TAP_SEL uses the GPIO_8 physical pin below Table 6.
Updated Table 17 on page 51.
*B
*C
5954959
5999198
UTSV
UTSV
11/02/2017 Added 5.12.SPI on page 23.
Added a Note: “ The SPI blocks can be re-purposed as I2C, however
the WICED SDK does not support this. Certain I2C features may be
unavailable when using the SPI blocks as I2C. Therefore Cypress
recommends using the the CSC blocks or a bit banging I2C driver
over GPIOs instead.” below Table 10 on page 38.
Added a 22.4.Errata on page 93 section.
12/22/2017 Updated Table 26 on page 61.
Updated Note “Note that the clock needs to be constrained to
~26.67MHz for reliable operation at high operating temperatures.
The throughput of the SPI Flash block is therefore restricted to
~13 MBps for Quad mode and ~3 MBps for single mode” for
5.9.SPI Flash on page 20.
Updated 22.4.Errata on page 93.
Document Number: 002-19312 Rev. *C
Page 94 of 95