BCM4354 Data Sheet
Ball Maps
Figure 34: WLBGA Ball Map, 4.87 × 7.67 Array, 192-Ball, A7 – V12 (Bottom View—Balls Facing Up)
12
11
10
9
8
7
SR
_PVSS
SR
_VLX
A
B
C
D
E
WL_REG_ON
SDIO_CMD
SDIO_CLK
HSIC_STROBE
SR
SR
PMU_AVSS
VSSC
SDIO_DATA_0
SDIO_DATA_1
JTAG_SEL
SDIO_DATA_2
SDIO_DATA_3
VDDC
HSIC_AVDD12PLL
RREFHSIC
_VDDBATP5V
_VDDBATA5V
LDO
_VDD1P5
VOUT
_CLDO
VOUT
_BTLDO2P5
VOUT
_LNLDO
BT_REG_ON
VDDIO
LDO
_VDDBAT5V
VOUT
_LDO3P3_B
VDDC
VDDIO_SD
GPIO_6
VSSC
GPIO_7
VOUT
_3P3
F
GPIO_2
GPIO_0
GPIO_1
VDDC
GPIO_5
GPIO_8
G
H
J
VSSC
GPIO_10
VDDC
GPIO_3
AVSS_BBPLL
AVDD_BBPLL
VDDIO_RF
GPIO_4
RF_SW
_CTRL_9
RF_SW_CTRL_12
VDDC
RF_SW
_CTRL_8
RF_SW
_CTRL_13
K
L
BT_VDDIO
VSSC
VSSC
VDDC
RF_SW_CTRL_11
RF_SW_CTRL_2
RF_SW_CTRL_15
RF_SW_CTRL_7
RF_SW_CTRL_1
RF_SW
_CTRL_10
RF_SW
_CTRL_14
M
N
P
R
T
VDDC
WRF_XTAL
_OUT
WRF_XTAL
_GND1P2
WRF_XTAL
_VDD1P2
RF_SW_CTRL_3
RF_SW_CTRL_5
RF_SW_CTRL_0
WRF_XTAL
_IN
WRF_XTAL
_VDD1P5
WRF_BUCK
_GND1P5_CORE1
WRF_BUCK
_VDD1P5_CORE1
WRF_GPIO_OUT
_CORE1
WRF_AFE
_GND1P2_CORE1
WRF_RX5G
_GND1P2_CORE1
WRF_TSSI
_A_CORE1
WRF_PADRV_VBAT
_GND3P3_CORE1
WRF_PADRV_VBAT
_VDD3P3_CORE1
WRF_TX
_GND1P2_CORE1
WRF_RX2G
_GND1P2_CORE1
WRF_LNA
_5G_GND1P2_CORE1
WRF_PA5G_VBAT
_GND3P3_CORE1
WRF_PA5G_VBAT
_GND3P3_CORE1
WRF_PA2G_VBAT
_GND3P3_CORE1
WRF_PA2G_VBAT
_GND3P3_CORE1
WRF_LNA_2G
_GND1P2_CORE1
U
V
WRF_RFIN
_5G_CORE1
WRF_RFOUT
_5G_CORE1
WRF_PA5G_VBAT
_VDD3P3_CORE1
WRF_PA2G_VBAT
_VDD3P3_CORE1
WRF_RFOUT
_2G_CORE1
WRF_RFIN
_2G_CORE1
12
11
10
9
8
7
Broadcom®
October 15, 2014 • 4354-DS109-R
Page 85
BROADCOM CONFIDENTIAL
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