Pinout and Signal Descriptions
BCM4339 Preliminary Data Sheet
Section 13: Pinout and Signal Descriptions
Ball Maps
Figure 38 shows the FCFBGA ball map. Figure 39 shows the WLBGA ball map. Figure 40 shows the WLCSP bump map.
Figure 38: 160-Ball FCFBGA (Top View)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
A
B
C
D
E
SR_VLX
GPIO_13
GPIO_5
GPIO_3
VDDIO_SD
SDIO_DATA_1
PAD_REFCLKN
PCIE_CLKREQ_L
A
B
C
D
E
SR_VDDBATP5V SR_VLX
VDDIO
GPIO_4
GPIO_7
GPIO_6
SDIO_DATA_3
SDIO_CLK
PAD_RDN0
PAD_RDP0
PCIE_VSS
PAD_TDP0
PAD_TDN0
PERST_L
GPIO_1
PAD_REFCLKP
PCI_PME_L
BT_GPIO_4
SR_VDDBATP5V SR_VDDBATP5V
SR_PVSS
SR_VDDBATA5V
BT_REG_ON JTAG_SEL
WL_REG_ON GPIO_15
GPIO_2
GPIO_14
GPIO_8
SDIO_DATA_2 SDIO_DATA_0
SDIO_CMD
GPIO_0
PCIE_VSS
PAD_PLL_AVDD1P2 PAD_AVDD1P2
SR_PVSS
SR_PVSS
VDDC
VDDC
VSSC
F
LDO_VDD1P5
LDO_VDD1P5
NO CONNECT
NO CONNECT
F
G
H
J
VOUT_CLDO
VDDC
VDDC
RF_SW_CTRL_8
RF_SW_CTRL_9
RF_SW_CTRL_7
RF_SW_CTRL_5 RF_SW_CTRL_6
RF_SW_CTRL_4
RF_SW_CTRL_3
RF_SW_CTRL_0
BBPLLAVDD
G
H
J
VOUT_3P3
VOUT_3P3_SENSE
VOUT_BTLDO2P5
VOUT_LNLDO
PMU_AVSS VSSC
VSSC
VSSC
VSSC
VSSC
VSSC
LPO_IN
RF_SW_CTRL_1 RF_SW_CTRL_2
K
L
VDDC
VSSC
VSSC
VDDIO_RF
K
L
LDO_VDDBAT5V PMU_VDDIO
BT_VDDIO
BT_VDDC
BT_VDDC
VSSC
WRF_VCO_GND1P2
WRF_BUCK_GND1P5
BBPLLAVSS
WRF_BUCK_VDD1P5
WRF_XTAL_GND1P2
WRF_CP_GND1P2
WRF_PFD_GND1P2
OTP_VDD33
M
BT_DEV_WAKE
BT_SF_MOSI
BT_SF_CLK
VSSC
VSSC
VSSC
WRF_LOGENG_GND1P2
M
N
P
R
HUSB_DN
HUSB_DP
WRF_XTAL_VDD1P5
N
P
R
BT_VCOVSS
WRF_RX2G_GND1P2
WRF_MMD_GND1P2
WRF_XTAL_GND1P2 WRF_XTAL_IN
WRF_XTAL_OUT
BT_SF_CSN
BT_SF_MISO
BT_PLLVSS BT_LNAVSS BT_IFVSS
BT_PAVSS
WRF_PA2G_VBAT_GND3P3 WRF_AFE_GND1P2
WRF_TX_GND1P2
WRF_PADRV_VBATGND3P3 WRF_LOGEN_GND1P2
BT_I2S_CLK
T
U
V
BT_UART_CTS_N
BT_I2S_DI
WRF_LNA_2G_GND1P2
WRF_GPIO_OUT
WRF_LNA_5G_GND1P2
WRF_RX5G_GND1P2
WRF_PFD_VDD1P2 WRF_XTAL_VDD1P2
WRF_MMD_VDD1P2
T
U
V
BT_I2S_WS
BT_I2S_DO
WRF_PA5G_VBAT_GND3P3
BT_UART_RTS_N
BT_HOST_WAKE
BT_VCOVDD BT_PLLVDD
BT_LNAVDD BT_IFVDD
BT_PAVDD
BT_RF
WRF_TSSI_A
WRF_PA2G_VBAT_GND3P3 WRF_PA2G_VBAT_VDD3P3 WRF_PADRV_VBAT_VDD3P3 WRF_PA5G_VBAT_VDD3P3 WRF_PA5G_VBAT_GND3P3
WRF_SYNTH_VBAT_VDD3P3
W
BT_UART_RXD
BT_UART_TXD
CLK_REQ
WRF_RFIN_2G
WRF_RFOUT_2G
WRF_RFOUT_5G
WRF_RFIN_5G
NO CONNECT
W
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
Broadcom®
November 17, 2014 • 4339-DS106-R
Page 94
CYPRESS [ CYPRESS ]
