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BCM43340HKUBG 参数 Datasheet PDF下载

BCM43340HKUBG图片预览
型号: BCM43340HKUBG
PDF下载: 下载PDF文件 查看货源
内容描述: [Single-Chip, Dual-Band (2.4 GHz/5 GHz) IEEE 802.11 a/b/g/n MAC/Baseband/Radio with Integrated Bluetooth 4.0]
分类和应用:
文件页数/大小: 96 页 / 1349 K
品牌: CYPRESS [ CYPRESS ]
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PRELIMINARY  
CYW43340  
Table 20. I/O States (Cont.)  
(WL_REG_ON=0  
and  
Before SW Download (WL_REG_ON=1 and BT_REG_ON=1)  
Power-down  
(BT_REG_ON and  
WL_REG_ON  
Held Low)  
Out-of-Reset;  
Low Power State/  
Sleep  
(All Power Present)  
(BT_REG_ON=1;  
WL_REG_ON=1)  
BT_REG_ON=0) and and VDDIOs Are  
VDDIOs Are Present Present  
Power  
Rail  
Name  
I/O Keeper Active Mode  
GPIO_4  
I/O  
Y
jtag_sel=1 PU;  
jtag_sel=0 PD  
jtag_sel=1 PU;  
jtag_sel=0 PD  
NoPull  
jtag_sel=1 PU;  
jtag_sel=0 PD  
jtag_sel=1 PU;  
jtag_sel=0 PD  
jtag_sel = 1 PU;  
jtag_sel = 0 PD  
WL_VDDI  
O
GPIO_5  
GPIO_6  
GPIO_12  
I/O  
I/O  
I/O  
Y
Y
Y
NoPull  
PD  
NoPull  
PD  
NoPull  
NoPull  
NoPull  
NoPull  
PD  
NoPull  
PD  
NoPull  
WL_VDDI  
O
PD  
WL_VDDI  
O
jtag_sel=1 PU;  
jtag_sel=0 PD  
jtag_sel=1 PU;  
jtag_sel=0 PD  
jtag_sel=1 PU;  
jtag_sel=0 PD  
jtag_sel=1 PU;  
jtag_sel=0 PD  
PU  
WL_VDDI  
O
1. Keeper column: N=pad has no keeper. Y=pad has a keeper. Keeper is always active except in Power-down state.  
2. If there is no keeper, and it is an input and there is Nopull, then the pad should be driven to prevent leakage due to floating pad (e.g., SDIO_CLK).  
3. In the Power-down state (xx_REG_ON=0): High-Z; NoPull => the pad is disabled because power is not supplied.  
4. Depending on whether the PCM interface is enabled and the configuration of PCM is in master or slave mode, it can be either output or input.  
2
2
5. Depending on whether the I S interface is enabled and the configuration of I S is in master or slave mode, it can be either output or input.  
6. GPIO_6 is input-only during the Low-Power and Deep-Sleep modes.  
7. GPIO_0 through GPIO_5 and GPIO_12 can be configured to operate as inputs or outputs in Deep-Sleep mode before entering the mode.  
8. The GPIO pull states for the Active and Low-Power states are hardware defaults. They can all be subsequently programmed as pull-ups or pull-downs.  
9. Regarding GPIO pins, the following are the pull-up and pull-down values for both 3.3V and 1.8V VDDIO:  
Minimum (k)  
Typical (k)  
Maximum (k)  
3.3V VDDIO, Pull-downs:  
3.3V VDDIO, Pull-ups:  
1.8V VDDIO, Pull-downs:  
1.8V VDDIO, Pull-ups:  
51.5  
37.4  
64  
44.5  
39.5  
83  
38  
44.5  
116  
118  
65  
86  
Document Number: 002-14943 Rev. *L  
Page 56 of 96  
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