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BCM4330FKUBG 参数 Datasheet PDF下载

BCM4330FKUBG图片预览
型号: BCM4330FKUBG
PDF下载: 下载PDF文件 查看货源
内容描述: [Telecom Circuit, 1-Func, PBGA133, WLBGA-133]
分类和应用:
文件页数/大小: 168 页 / 1861 K
品牌: CYPRESS [ CYPRESS ]
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2
BCM4330 Preliminary Data Sheet  
I S Interface  
Table 13: Timing for I2S Transmitters and Receivers  
Transmitter Receiver  
Lower LImit Upper Limit Lower Limit Upper Limit  
Min  
Max  
Min  
Max  
Min  
Max  
Min  
Max  
Notes  
Clock Period T  
Ttr  
Tr  
1
Master Mode: Clock generated by transmitter or receiver  
HIGH tHC  
LOWtLC  
0.35Ttr  
0.35Ttr  
0.35Ttr  
0.35Ttr  
2
2
Slave Mode: Clock accepted by transmitter or receiver  
HIGH tHC  
LOW tLC  
Rise time tRC  
0.35Ttr  
0.35Ttr  
0.35Ttr  
0.35Ttr  
3
3
4
0.15Ttr  
Transmitter  
Delay tdtr  
Hold time thtr  
0
0.8T  
5
4
Receiver  
Setup time tsr  
Hold time thr  
0.2Tr  
0
6
6
Note:  
• The system clock period T must be greater than Ttr and Tr because both the transmitter and  
receiver have to be able to handle the data transfer rate.  
• At all data rates in master mode, the transmitter or receiver generates a clock signal with a fixed  
mark/space ratio. For this reason, tHC and tLC are specified with respect to T.  
• In slave mode, the transmitter and receiver need a clock signal with minimum HIGH and LOW  
periods so that they can detect the signal. So long as the minimum periods are greater than 0.35Tr,  
any clock that meets the requirements can be used.  
• Because the delay (tdtr) and the maximum transmitter speed (defined by Ttr) are related, a fast  
transmitter driven by a slow clock edge can result in tdtr not exceeding tRC which means thtr  
becomes zero or negative. Therefore, the transmitter has to guarantee that thtr is greater than or  
equal to zero, so long as the clock rise-time tRC is not more than tRCmax, where tRCmax is not less  
than 0.15Ttr.  
• To allow data to be clocked out on a falling edge, the delay is specified with respect to the rising  
edge of the clock signal and T, always giving the receiver sufficient setup time.  
• The data setup and hold time must not be less than the specified receiver setup and hold time.  
Note: The time periods specified in Figure 19 and Figure 20 are defined by the transmitter speed. The  
receiver specifications must match transmitter performance.  
®
BROADCOM  
BCM4330 Preliminary Data Sheet  
April 28, 2011 • 4330-DS304-RI  
Page 64  
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