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BCM20738A1KFBG 参数 Datasheet PDF下载

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型号: BCM20738A1KFBG
PDF下载: 下载PDF文件 查看货源
内容描述: [On-chip support for common keyboard and mouse interfaces eliminates external processor]
分类和应用:
文件页数/大小: 42 页 / 3615 K
品牌: CYPRESS [ CYPRESS ]
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CYW20738  
1.5.6 Test Mode Support  
The CYW20738 fully supports Bluetooth Test mode, as described in the Bluetooth Low Energy specification.  
1.6 ADC Port  
The CYW20738 contains a 16-bit ADC (effective number of bits is 10).  
Additionally:  
There are 29 analog input channels in the 64-pin package, and 13 analog input channels in the 40-pin package. All channels are  
multiplexed on various GPIOs.  
The conversion time is 10 s.  
There is a built-in reference with supply- or band-gap based reference modes.  
The maximum conversion rate is 187 kHz.  
There is a rail-to-rail input swing.  
The ADC consists of an analog ADC core that performs the actual analog-to-digital conversion and digital hardware that processes  
the output of the ADC core into valid ADC output samples. Directed by the firmware, the digital hardware also controls the input  
multiplexers that select the ADC input signal Vinp and the ADC reference signals Vref  
.
Table 2. ADC Modes  
Mode  
ENOB (Typical)  
Maximum Sampling Rate (kHz)  
Latencya (s)  
0
1
2
3
4
13  
12.6  
12  
5.859  
11.7  
171  
85  
21  
11  
5
46.875  
93.75  
187  
11.5  
10  
a. Settling time after switching channels.  
1.7 Serial Peripheral Interface  
The CYW20738 has two independent SPI interfaces. One is a master-only interface and the other can be either a master or a slave.  
Each interface has a 16-byte transmit buffer and a 16-byte receive buffer. To support more flexibility for user applications, the  
CYW20738 has optional I/O ports that can be configured individually and separately for each functional pin, as shown in Table 3. The  
CYW20738 acts as an SPI master device that supports 1.8V to 3.3V SPI slaves, as shown in Table 3. The CYW20738 can also act  
as an SPI slave device that supports a 1.8V to 3.3V SPI master using the second SPI interface, as shown in Table 3.  
Table 3. CYW20738 First SPI Set (Master Mode)  
Pin Name  
Configuration set 1  
Configuration set 2  
SPI_CLK  
SCL  
SPI_MOSI  
SDA  
SPI_MISO  
P24  
SPI_CSa  
SCL  
SDA  
P26  
Configuration set 3  
SCL  
SDA  
P32  
P33  
(Default for serial flash)  
Configuration set 4  
SCL  
SDA  
P39  
a. Any GPIO can be used as SPI_CS when SPI is in master mode.  
Document Number: 002-14891 Rev. *C  
Page 7 of 42  
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