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AN2131QC 参数 Datasheet PDF下载

AN2131QC图片预览
型号: AN2131QC
PDF下载: 下载PDF文件 查看货源
内容描述: 在EZ - USBTM集成电路 [The EZ-USBTM Integrated Circuit]
分类和应用:
文件页数/大小: 334 页 / 1468 K
品牌: CYPRESS [ CYPRESS ]
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CLK24  
Baud Rate =  
32 x (65536 - RCAP2H,RCAP2L)  
where RCAP2H,RCAP2L is the content of RCAP2H and RCAP2L taken as a 16-bit unsigned  
number.  
The 32 in the denominator is the result of CLK24 being divided by 2 and the Timer 2 overflow  
being divided by 16. Setting TCLK or RCLK to 1 automatically causes CLK24 to be divided  
by 2, as shown in Figure C-6., instead of the 4 or 12 determined by the T2M bit in the  
CKCON SFR.  
To derive the required RCAP2H and RCAP2L values from a known baud rate, use the  
equation:  
CLK24  
RCAP2H,RCAP2L =  
65536 -  
32 x Baud Rate  
When either RCLK or TCLK is set, the TF2 flag will not be set on a Timer 2 roll over, and the  
T2EX reload trigger is disabled.  
Table C-11. Timer 2 Reload Values for Common Serial port Mode 1 Baud Rates  
Nominal  
Rate  
Diviso  
r
Actual  
Rate  
C/T2  
Reload Val  
Error  
57600  
38400  
28800  
19200  
9600  
0
0
0
0
0
0
0
13  
20  
F3  
EC  
E6  
57692.31  
37500  
0.16%  
-2.34%  
0.16%  
0.16%  
0.16%  
0.16%  
0.16%  
26  
28846.15  
19230.77  
9615.385  
4807.692  
2403.846  
39  
D9  
78  
B2  
4800  
156  
312  
64  
2400  
FEC8  
Note: using rates that are off by 2.3% or more will not work in all systems.  
EZ-USB TRM v1.9  
Appendix C: 8051 Hardware Description  
C - 21  
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