P R E L I M I N A R Y
Table 2. Device Bus Operations—Flash Byte Mode, CIOf = VIL
Operation
(Notes 1, 2)
WP#/ACC
(Note 4)
DQ7–
DQ0
DQ15–
DQ8
CE#f CE1#s CE2s OE# WE#
Address
LB#s UB#s RESET#
(Note 7)
(Note 8)
(Note 7)
(Note 8)
H
H
H
H
H
L
Read from
Flash
AIN
DOUT
L
L
H
L
X
X
X
X
H
L/H
High-Z
High-Z
H
L
AIN
DIN
Write to Flash
Standby
L
H
H
(Note 4)
VCC
±
VCC ±
H
H
H
L
X
X
X
X
X
X
X
X
X
X
H
H
High-Z
High-Z
High-Z
High-Z
0.3 V
0.3 V
VCC
±
VCC
±
Deep Power-down
Standby
0.3 V
0.3 V
H
H
H
H
X
X
X
X
X
X
Output Disable
L
L
H
H
L/H
L/H
L/H
High-Z
High-Z
DIN
High-Z
High-Z
X
(Note 7)
H
H
H
H
H
H
L
Flash Hardware
Reset
X
L
X
H
X
L
X
X
X
X
X
L
(Note 8)
(Note 7)
(Note 8)
(Note 7)
H
L
Sector Protect
(Note 5)
SADD, A6 = L,
A1 = H, A0 = L
VID
Sector
Unprotect
(Note 5)
H
SADD, A6 = H,
A1 = H, A0 = L
VID
DIN
L
H
X
L
X
X
X
X
(Note 6)
(Note 6)
X
(Note 8)
(Note 7)
(Note 8)
H
H
H
L
H
L
Temporary
Sector
Unprotect
VID
DIN
X
X
X
High-Z
DOUT
DOUT
DOUT
L
H
L
L
L
AIN
Read from pSRAM
Write to pSRAM
H
H
L
L
H
H
L
H
L
H
H
X
X
High-Z
DOUT
DIN
H
L
High-Z
DIN
L
AIN
DIN
X
H
L
L
High-Z
DIN
H
High-Z
Legend: L = Logic Low = VIL, H = Logic High = VIH, VID = 11.5–12.5 V, VHH = 9.0 ± 0.5 V, X = Don’t Care, SA = pSRAM Address Input, Byte Mode,
SADD = Flash Sector Address, AIN = Address In, DIN = Data In, DOUT = Data Out
Notes:
1. Other operations except for those indicated in this column are
inhibited.
5. The sector protect and sector unprotect functions may also be
implemented via programming equipment. See the “Autoselect
Mode” section.
2. Do not apply CE#f = VIL, CE1#s = VIL and CE2s = VIH at the same
time.
6. If WP#/ACC = VIL, the two outermost boot sectors remain
protected. If WP#/ACC = VIH, the two outermost boot sector
protection depends on whether they were last protected or
unprotected using the method described in “Autoselect Mode”. If
WP#/ACC = VHH, all sectors will be unprotected.
3. Don’t care or open LB#s or UB#s.
4. If WP#/ACC = VIL , the boot sectors will be protected. If WP#/ACC
= VIH the boot sectors protection will be removed.
If WP#/ACC = VACC (9V), the program time will be reduced by
40%.
7. Data will be retained in pSRAM.
8. Data will be lost in pSRAM.
July 19, 2002
Am49DL32xBG
11
CYPRESS [ CYPRESS ]
