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AM49DL323BGB85IS 参数 Datasheet PDF下载

AM49DL323BGB85IS图片预览
型号: AM49DL323BGB85IS
PDF下载: 下载PDF文件 查看货源
内容描述: [Memory Circuit, Flash+PSRAM, CMOS, PBGA73,]
分类和应用: 静态存储器内存集成电路
文件页数/大小: 64 页 / 1054 K
品牌: CYPRESS [ CYPRESS ]
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P R E L I M I N A R Y  
needed to execute the command. The contents of the  
MCP DEVICE BUS OPERATIONS  
register serve as inputs to the internal state machine.  
The state machine outputs dictate the function of the  
device. Tables 1-2 lists the device bus operations, the  
inputs and control levels they require, and the result-  
ing output. The following subsections describe each of  
these operations in further detail.  
This section describes the requirements and use of  
the device bus operations, which are initiated through  
the internal command register. The command register  
itself does not occupy any addressable memory loca-  
tion. The register is a latch used to store the com-  
mands, along with the address and data information  
Table 1. Device Bus OperationsFlash Word Mode, CIOf = VIH  
Operation  
(Notes 1, 2)  
WP#/ACC  
(Note 4)  
DQ7–  
DQ0  
DQ15–  
DQ8  
CE#f CE1#s CE2s OE# WE#  
Address  
LB#s UB#s RESET#  
(Note 7)  
(Note 8)  
(Note 7)  
(Note 8)  
H
H
H
H
H
L
Read from  
Flash  
AIN  
DOUT  
DOUT  
L
L
H
L
X
X
X
X
H
L/H  
H
L
AIN  
DIN  
DIN  
Write to Flash  
Standby  
L
H
H
(Note 4)  
VCC  
±
VCC ±  
H
H
H
L
X
X
X
X
X
X
X
X
X
X
H
H
High-Z  
High-Z  
High-Z  
High-Z  
0.3 V  
0.3 V  
VCC  
±
VCC  
±
Deep Power-down  
Standby  
0.3 V  
0.3 V  
H
H
H
H
X
X
X
X
X
X
Output Disable  
L
L
H
H
L/H  
L/H  
L/H  
High-Z  
High-Z  
DIN  
High-Z  
High-Z  
X
(Note 7)  
H
H
H
H
H
H
L
Flash Hardware  
Reset  
X
L
X
H
X
L
X
X
X
X
X
L
(Note 8)  
(Note 7)  
(Note 8)  
(Note 7)  
H
L
Sector Protect  
(Note 5)  
SADD, A6 = L,  
A1 = H, A0 = L  
VID  
Sector  
Unprotect  
(Note 5)  
H
SADD, A6 = H,  
A1 = H, A0 = L  
VID  
DIN  
DIN  
L
H
X
L
X
X
X
X
(Note 6)  
(Note 6)  
X
(Note 8)  
(Note 7)  
(Note 8)  
H
H
H
L
H
L
Temporary  
Sector  
Unprotect  
VID  
X
X
X
High-Z  
DOUT  
High-Z  
DOUT  
DIN  
DOUT  
DOUT  
High-Z  
DIN  
L
H
L
L
L
AIN  
Read from pSRAM  
Write to pSRAM  
H
H
L
L
H
H
L
H
L
H
H
X
X
H
L
L
AIN  
DIN  
X
H
L
L
High-Z  
DIN  
H
High-Z  
Legend: L = Logic Low = VIL, H = Logic High = VIH, VID = 11.5–12.5 V, VHH = 9.0 ± 0.5 V, X = Don’t Care, SA = pSRAM Address Input, Byte Mode,  
SADD = Flash Sector Address, AIN = Address In, DIN = Data In, DOUT = Data Out  
Notes:  
1. Other operations except for those indicated in this column are  
inhibited.  
5. The sector protect and sector unprotect functions may also be  
implemented via programming equipment. See the “Autoselect  
Mode” section.  
2. Do not apply CE#f = VIL, CE1#s = VIL and CE2s = VIH at the same  
time.  
6. If WP#/ACC = VIL, the two outermost boot sectors remain  
protected. If WP#/ACC = VIH, the two outermost boot sector  
protection depends on whether they were last protected or  
unprotected using the method described in “Autoselect Mode”. If  
WP#/ACC = VHH, all sectors will be unprotected.  
3. Don’t care or open LB#s or UB#s.  
4. If WP#/ACC = VIL , the boot sectors will be protected. If WP#/ACC  
= VIH the boot sectors protection will be removed.  
If WP#/ACC = VACC (9V), the program time will be reduced by  
40%.  
7. Data will be retained in pSRAM.  
8. Data will be lost in pSRAM.  
10  
Am49DL32xBG  
July 19, 2002