P R E L I M I N A R Y
AC CHARACTERISTICS
Hardware Reset (RESET#)
Parameter
JEDEC
Std Description
RESET# Pin Low (During Embedded
Test Setup
Max
All Speed Options
Unit
t
t
20
µs
READY
Algorithms) to Read or Write (See Note)
RESET# Pin Low (NOT During Embedded
Algorithms) to Read or Write (See Note)
Max
500
ns
READY
t
t
RESET# Pulse Width
Min
Min
Min
Min
500
50
20
0
ns
ns
µs
ns
RP
RESET# High Time Before Read (See Note)
RESET# Low to Standby Mode
RY/BY# Recovery Time
RH
t
RPD
t
RB
Note: Not 100% tested.
RY/BY#
CE#, OE#
RESET#
tRH
tRP
tReady
Reset Timings NOT during Embedded Algorithms
Reset Timings during Embedded Algorithms
tReady
RY/BY#
tRB
CE#, OE#
RESET#
tRP
20514C-17
Figure 13. RESET# Timings
27
Am29LV400
CYPRESS [ CYPRESS ]
